MSM514101BL-70TS-L datasheet, PDF

MSM514101BL-70TS-L: DescriptionNibble Mode DRAM, 4MX1, 70ns, CMOS, PDSO20; Categorystorage storage; File Size727KB，15 Pages; ManufacturerLAPIS Semiconductor Co., Ltd.

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MSM514101BL-70TS-L Overview

Nibble Mode DRAM, 4MX1, 70ns, CMOS, PDSO20

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	1156939789
package instruction	TSSOP, TSSOP20/26,.36
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	70 ns
I/O type	SEPARATE
JESD-30 code	R-PDSO-G20
JESD-609 code	e0
memory density	4194304 bit
Memory IC Type	NIBBLE MODE DRAM
memory width	1
Number of terminals	20
word count	4194304 words
character code	4000000
Maximum operating temperature	70 °C
Minimum operating temperature
organize	4MX1
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP20/26,.36
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Certification status	Not Qualified
refresh cycle	1024
reverse pinout	YES
Maximum standby current	0.0002 A
Maximum slew rate	0.09 mA
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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