C1210C249BAGAL7210 datasheet, PDF

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Commercial “L” Series, SnPb Termination, C0G Dielectric

10 – 250 VDC (Commercial Grade)

Overview

KEMET’s Commercial “L” Series with Tin/Lead Termination

surface mount capacitors in C0G dielectric are designed to

meet the needs of critical applications where tin/lead end

metallization is required. KEMET’s tin/lead electroplating

process is designed to meet a 5% minimum lead content

and address concerns for a more robust and reliable

lead containing termination system. As the bulk of the

electronics industry moves towards RoHS compliance,

KEMET continues to provide tin/lead terminated products

for military, aerospace and industrial applications and will

ensure customers have a stable and long-term source of

supply.

KEMET’s C0G dielectric features a 125°C maximum

operating temperature and is considered “stable.”

The Electronics Components, Assemblies & Materials

Association (EIA) characterizes C0G dielectric as a Class I

material. Components of this classification are temperature

compensating and are suited for resonant circuit

applications or those where Q and stability of capacitance

characteristics are required. C0G exhibits no change in

capacitance with respect to time and voltage and boasts a

negligible change in capacitance with reference to ambient

temperature. Capacitance change is limited to ±30 ppm/ºC

from −55°C to +125°C.

Benefits

• −55°C to +125°C operating temperature range

• Reliable and robust termination system

• EIA 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825,

2220, and 2225 case sizes

• DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, 200 V

and 250 V

• Capacitance offerings ranging from 0.5 pF up to 0.47 μF

• Available capacitance tolerances of ±0.10 pF, ±0.25 pF, ±0.5

pF, ±1%, ±2%, ±5%, ±10%, and ±20%

Ordering Information

C

Ceramic

1206

C

104

Capacitance

Code (pF)

Two significant digits

and number of zeros.

Use 9 for 1.0 – 9.9 pF

Use 8 for 0.5 – .99 pF

e.g., 2.2 pF = 229

e.g., 0.5 pF = 508

J

3

G

A

L

Termination

Finish

2

L = SnPb

(5% Pb

minimum)

TU

Packaging/

Grade (C-Spec)

See

“Packaging

C-Spec

Ordering

Options

Table”

Case Size

Specification/

(L" x W")

Series

0402

0603

0805

1206

1210

1805

1808

1812

1825

2220

2225

C = Standard

Failure Rate/

Capacitance Rated Voltage

Dielectric

1

Tolerance

(VDC)

Design

B = ±0.10 pF

C = ±0.25 pF

D = ±0.5 pF

F = ±1%

G = ±2%

J = ±5%

K = ±10%

M = ±20%

8 = 10

4 = 16

3 = 25

5 = 50

1 = 100

2 = 200

A = 250

G = C0G

A = N/A

1

2

Additional capacitance tolerance offerings may be available. Contact KEMET for details.

Additional termination finish options may be available. Contact KEMET for details

Built Into Tomorrow

C1019_C0G_SnPb_SMD • 12/6/2021

1

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Commercial “L” Series, SnPb Termination, C0G Dielectric, 10 – 250 VDC (Commercial Grade)

Packaging C-Spec Ordering Options Table

Packaging Type

1

Bulk Bag/Unmarked

7" Reel/Unmarked

13" Reel/Unmarked

7" Reel/Unmarked/2 mm pitch

2

13" Reel/Unmarked/2 mm pitch

2

1

Packaging/Grade

Ordering Code (C-Spec)

Not required (Blank)

TU

7411 (EIA 0603 and smaller case sizes)

7210 (EIA 0805 and larger case sizes)

7081

7082

Default packaging is “Bulk Bag”. An ordering code C-Spec is not required for “Bulk Bag” packaging.

The terms “Marked” and “Unmarked” pertain to laser marking option of capacitors. All packaging options labeled as “Unmarked” will contain

capacitors that have not been laser marked. The option to laser mark is not available on these devices. For more information see “Capacitor Marking”.

2

The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case

size devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.

Benefits cont.

•

No piezoelectric noise

Extremely low ESR and ESL

High thermal stability

High ripple current capability

Preferred capacitance solution at line frequencies and into

the MHz range

• Negligible capacitance change with respect to temperature

from −55°C to +125°C

• No capacitance change with respect to applied rated DC

voltage

• No capacitance decay with time

• Non-polar device, minimizing installation concerns

• SnPb plated termination finish (5% Pb minimum)

• Flexible termination option available upon request

• Available for other surface mount products, additional

dielectrics and higher voltage ratings upon request

Applications

Typical applications include military, aerospace and other high reliability applications.

C1019_C0G_SnPb_SMD • 12/6/2021

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Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Commercial “L” Series, SnPb Termination, C0G Dielectric, 10 – 250 VDC (Commercial Grade)

Dimensions – Millimeters (Inches)

W

L

T

B

S

EIA Size

Code

0201

0402

0603

0805

1206

1210

1805

1808

1812

1825

2220

2225

Metric Size

Code

0603

1005

1608

2012

3216

3225

4513

4520

4532

4564

5650

5664

L

Length

0.60 (0.024)

±0.03 (0.001)

1.00 (0.040)

±0.05 (0.002)

1.60 (0.063)

±0.15 (0.006)

2.00 (0.079)

±0.20 (0.008)

3.20 (0.126)

±0.20 (0.008)

3.20 (0.126)

±0.20 (0.008)

4.50 (0.177)

±0.50 (0.020)

4.70 (0.185)

±0.50 (0.020)

4.50 (0.177)

±0.30 (0.012)

4.50 (0.177)

±0.30 (0.012)

5.70 (0.224)

±0.40 (0.016)

5.60 (0.220)

±0.40 (0.016)

W

Width

0.30 (0.012)

±0.03 (0.001)

0.50 (0.020)

±0.05 (0.002)

0.80 (0.032)

±0.15 (0.006)

1.25 (0.049)

±0.20 (0.008)

1.60 (0.063)

±0.20 (0.008)

2.50 (0.098)

±0.20 (0.008)

1.27 (0.050)

±0.38 (0.015)

2.00 (0.079)

±0.20 (0.008)

3.20 (0.126)

±0.30 (0.012)

6.40 (0.252)

±0.40 (0.016)

5.00 (0.197)

±0.40 (0.016)

6.40 (0.248)

±0.40 (0.016)

T

Thickness

B

Bandwidth

0.15 (0.006)

±0.05 (0.002)

0.30 (0.012)

±0.10 (0.004)

0.35 (0.014)

±0.15 (0.006)

0.50 (0.02)

±0.25 (0.010)

0.50 (0.02)

±0.25 (0.010)

0.50 (0.02)

±0.25 (0.010)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

S

Separation

Minimum

N/A

0.30 (0.012)

0.70 (0.028)

0.75 (0.030)

Mounting

Technique

Solder Reflow

Only

Solder Wave or

Solder Reflow

See Table 2 for

Thickness

N/A

Solder Reflow

Only

Qualification/Certification

Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are

referenced in Table 4, Performance & Reliability.

Environmental Compliance

These devices do not meet RoHS criteria due to the concentration of Lead (Pb) in the termination finish.

C1019_C0G_SnPb_SMD • 12/6/2021

3

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Commercial “L” Series, SnPb Termination, C0G Dielectric, 10 – 250 VDC (Commercial Grade)

Electrical Parameters/Characteristics

Item

Operating Temperature Range

Capacitance Change with Reference to

+25°C and 0 VDC Applied (TCC)

Aging Rate (Maximum % Capacitance Loss/Decade Hour)

1

Parameters/Characteristics

−55°C to +125°C

±30 ppm/ºC

0%

250% of rated voltage

(5±1 seconds and charge/discharge not exceeding 50 mA)

0.1%

1,000 megohm microfarads or 100 GΩ

(Rated voltage applied for 120±5 seconds at 25°C)

Dielectric Withstanding Voltage (DWV)

2

Dissipation Factor (DF) Maximum Limit at 25ºC

3

Insulation Resistance (IR) Limit at 25°C

DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the

capacitor.

2

Capacitance and dissipation factor (DF) measured under the following conditions:

1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF

1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF

3

To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Capacitance and Dissipation Factor (DF) measured under the following conditions:

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known

as Automatic Level Control (ALC). The ALC feature should be switched to "ON."

1

Post Environmental Limits

High Temperature Life, Biased Humidity, Moisture Resistance

Dielectric

C0G

Rated DC

Voltage

All

Capacitance

Value

All

Dissipation Factor

(Maximum %)

0.5

Capacitance

Shift

0.3% or ±0.25 pF

Insulation

Resistance

10% of Initial

Limit

C1019_C0G_SnPb_SMD • 12/6/2021

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Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Commercial “L” Series, SnPb Termination, C0G Dielectric, 10 – 250 VDC (Commercial Grade)

Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes)

Cap

Code

Case Size/

Series

Voltage Code

8

10

4

16

C0402C

3

25

5

50

1

100

2

200

A

250

8

10

4

16

C0603C

3

25

5

50

1

100

2

200

A

250

8

10

4

16

C0805C

3

25

5

50

1

100

2

200

A

250

8

10

4

16

C1206C

3

25

5

50

1

100

2

200

EB

EC

ED

2

200

A

250

EB

EC

ED

A

250

Cap

0.50 & 0.75 pF

1.0 – 9.1 pF*

10 – 20 pF*

22 pF

24 – 91 pF*

100 pF

110 – 180 pF*

200 – 270 pF

300 pF

330 pF

360 pF

390 pF

430 pF

470 pF

510 pF

560 pF

620 pF

680 pF

750 pF

820 pF

910 pF

1,000 pF

1,100 pF

1,200 pF

1,300 pF

1,500 pF

1,600 pF

1,800 pF

Rated Voltage (VDC)

Capacitance

Tolerance

508 & 758 B C D

BB

109 –

B C D

BB

919*

100 –

F G J K M BB

200*

220

F G J K M BB

240 –

F G J K M BB

910*

101

F G J K M BB

111 – 181*

F G J K M BB

201 –

F G J K M BB

271*

301

F G J K M BB

331

F G J K M BB

361

F G J K M BB

391

F G J K M BB

431

F G J K M BB

471

F G J K M BB

511

F G J K M BB

561

F G J K M BB

621

F G J K M BB

681

F G J K M BB

751

F G J K M BB

821

F G J K M BB

911

F G J K M BB

102

F G J K M BB

112

F G J K M BB

122

F G J K M BB

132

F G J K M BB

152

F G J K M BB

162

F G J K M BB

182

F G J K M BB

Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

BB BB BB

CF CF CF CF CF CF CF DN DN DN DN DN DN DN

CF CF CF CF CF CF CF DN DN DN DN DN DN DN EB EB EB EB EB EB EB

BB BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN EB EB EB EB EB EB EB

BB

16

4

BB

25

3

BB

BB BD BD CF CF CF CF CF CF CF DN DN DN DN DN

BB