CVPD-940 Model
9×14 mm SMD,
3.3V, LVPECL
Frequency Range:
Temperature Range:
(Option X)
Storage:
Input Voltage:
Control Voltage:
Settability At Nominal:
Input Current:
Output:
Symmetry:
Rise/Fall Time:
Pullability APR:
Linearity:
Load: Terminated to Vdd-2V
Logic "1" Level:
Logic "0" Level:
Disable Time:
Start-up time:
Modulation BW:
Sub-harmonics:
Period Jitter:
Phase Jitter:
(20,000 periods)
12kHz~20MHz
50kHz~80MHz
100Hz
1kHz
10kHz
100kHz
50 MHz to 212.500 MHz
0°C to 70°C
-40°C to 85°C
-45°C to 90°C
3.3V ±0.3V
1.65V ±1.65V
1.65V ±0.25V
88mA Max
Differential LVPECL
49/51% Typical, 45/55% Max
550ps Max @ 20% to 80% Vcc
±50ppm Min
±10% Max
into 50 ohms
Vcc-0.96V Min, Vcc-0.81V Max
Vcc-1.85V Min, Vcc-1.65V Max
100ns Max
2ms Typical, 10ms Max
>10kHz @ -3dB
none
<5ps RMS (1-sigma) Max
<1ps RMS (1-sigma) Max,
<1ps RMS (1-sigma) Max,
-80 dBc/Hz
-108 dBc/Hz
-132 dBc/Hz
-140 dBc/Hz
<3ppm 1
st
year, <2ppm every year thereafter
Phase Noise Max:
Aging:
Applications:
10 Gigabit Ethernet
OC48: Forward Error Correction
Broadband Networks
SONET/SDH/DWD
ATM
Network/switch
Telecom
Designed using FR5 PCB & HFF crystal technology to
provide a Low Noise, Low Jitter Voltage Controlled Crystal
Oscillator solution at a competitive price.
TD-030705 Rev. G
Specifications subject to change without notice.
Page 1 of 2
CRYSTEK
CORPORATION
12730 Commonwealth Drive • Fort Myers, Florida 33913
Phone: 239-561-3311 • 800-237-3061
Fax: 239-561-1025 • www.crystek.com
CVPD-940 Model
9×14 mm SMD,
3.3V, LVPECL
Crystek Part Number Guide
0.560
(14.2)
CVPD - 940 - X - 155.520
#1
#2
#3
#4
0.360
(9.14)
CRYSTEK
P/N
Frequency
Date Code
0.100
(2.54)
0.560
(14.2)
0.040
(1.01)
#1
#2
#3
#4
Crystek SMD PECL VCXO
Model 940 = 9×14 High Frequency 3.3V
Temp. Range: Blank = 0/70°C, X = -40/85°C
Frequency in MHz: 3 or 6 decimal places
1
6
2
5
0.200
(5.08)
3
4
0.070
(1.77)
Example:
CVPD-940X-155.520 = 3.3V, -40/85°C, 155.520 MHz
0.210
(5.3)
Standard Frequencies MHz
74.175800
74.250
77.760
155.520
156.250
161.132800
166.628600
167.331700
212.500
PIN
1
2
3
4
5
6
Function
Vcont
E/D
GND
OUT
COUT
Vdd
SUGGESTED PAD LAYOUT
via to
ground
0.01µF
0.050
(1.27)
RECOMMENDED REFLOW SOLDERING PROFILE
Ramp-Up
3°C/Sec Max.
TEMPERATURE
260°C
217°C
200°C
150°C
Critical
Temperature Zone
Ramp-Down
6°C/Sec.
0.090
(2.28)
0.280
(7.11)
Enable/Disable Function
Pin 2
Open
"0" level Vcc-1.620V Max
"1" level Vcc-1.025V Min
Output pin
Active
Active
Disabled
0.200
(5.08)
Preheat
180 Secs. Max.
8 Minutes Max.
90 Secs. Max.
260°C for
10 Secs. Max.
NOTE: Reflow Profile with 240°C peak also acceptable.
Disabled State:
Pin 4 will assume a fixed level of logic "0"
Pin 5 will assume a fixed level of logic "1"
Mechanical:
Shock:
Solderability:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
Environmental:
Thermal Shock:
Moisture Resistance:
Packaging:
Tape/Reel:
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2003
MIL-STD-883, Method 2007, Condition A
MIL-STD-202, Method 215
MIL-STD-202, Method 210, Condition I or J
MIL-STD-883, Method 1011, Condition A
MIL-STD-883, Method 1004
100ea, 250ea, 500ea 24mm Tape
Specifications subject to change without notice.
TD-030705 Rev. G
Page 2 of 2
CRYSTEK
CORPORATION
12730 Commonwealth Drive • Fort Myers, Florida 33913
Phone: 239-561-3311 • 800-237-3061
Fax: 239-561-1025 • www.crystek.com