Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8Mx4
nOUT
OUT
V
DD
Crystal Oscillator:
LVDS C
LOCK
O
UTPUT
ICS8Mx4
L
OW
J
ITTER
, H
IGH
F
REQUENCY
X
TAL
O
SCILLATOR
•
(including initial accuracy, operating temperature variation,
supply voltage variation, load variation, reflow drift, and aging for 10 years)
Low phase jitter < 1 ps rms maximum
(12kHz to 20MHz)
6-pin CERHERMETIC 5 x 7 x 1.5mm SMT
E
LECTRICAL
S
PECIFICATIONS
Unless stated otherwise, V
DD
= 2.5 Volts + 5% or 3.3 Volts + 5%, T
A
= 0
o
C to +70
o
C (commercial), T
A
= -40
o
C to +85
o
C (industrial)
Parameter
Min
Typ
Max
Unit
Conditions
DC
C
HARACTERISTICS
Power Supply Voltage
V
DD
3.135
3.3
3.465
V
3.3V operation
Power Supply
2.375
2.5
2.625
V
2.5V operation
in
8MJ4 and 8MK4 only
(V
DD
, V
EE
pins)
Power Supply Current
I
EE
83
mA
OE
= V
DD
Current with Output Disable
Input Capacitance
Input High Voltage
Output Enable
Input Low Voltage
(OE pin)
LVCMOS/LVTTL Input High Current
Input Low Current
Internal Pull-up Resistor
Clock Output
Level
(OUT, nOUT)
LVDS
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
I
OED
C
IN
V
IH
V
IL
I
IH
I
IL
R
PULLUP
V
OD
∆
V
OD
V
OS
∆
V
OS
75
∆f/f
O
odc
t
R
t
F
t
OSC
50
600
600
10
1.25
150
750
±100
±50
Output Duty Cycle
Output Rise Time
Output Fall Time
Oscillator Start-up Time
-150
51
350
50
0.7 x
V
DD
5
4
<0.6
mA
pF
V
0.3 x
V
DD
V
µA
µA
kΩ
mV
mV
V
mV
MHz
ppm p-p
ppm p-p
%
ps
ps
ms
20%
to
80%
of V
OD
20%
to
80%
of V
OD
in 8MH4 and 8MK4
in 8MG4 and 8MJ4
All conditions
Includes frequency set,
V
DD
,
T
A
& load variation,
reflow drift, 10 yr. aging
See
Output Duty Cycle diagram
and Rise and Fall Time diagram
in P
ARAMETER
M
EASUREMENT
I
NFORMATION
.
OE
= G
ND
V
DD
= V
IN
= 2.625 or 3.465V
V
DD
= 2.625 or 3.465V,
V
IN
= 0V
100Ω
terminatation between
OUT
and
nOUT
.
See P
ARAMETER
M
EASUREMENT
I
NFORMATION
.
AC
C
HARACTERISTICS
Output Frequency Range
Output
Frequency Stability error
(OUT, nOUT)
Time at Min. V
DD
(3.135V or 2.375V) to be 0s
(design target)
Deterministic
Random
Root Mean Square
Peak to Peak
Accumulated Jitter
n = 2 to 50,000 cycles
σ
of Random jitter
σ
of Total jitter distribution
RMS Phase Jitter, (Random)
1
t
jit(Ø)
Jitter
t
DS
t
RS
t
RMS
t
P
-
P
t
acc
1
2
2
2
2
0.2
3
3
25
4
<1
ps rms
design target
ps
ps
ps
ps
ps
Note 1: Measured using an Aeroflex PN9500 with a 12 kHz to 20MHz integration range.
Note 2: Measured using a Wavecrest SIA-3000.
S
UPPLY
V
OLTAGE
& F
REQUENCY
A
CCURACY
G
H
J
K
=
=
=
=
3.3V
3.3V
2.5V / 3.3V
2.5V / 3.3V
±50
ppm
±
100 ppm
±
50 ppm
±
100 ppm
ICS8Mx4 Datasheet Rev A
I n t e g r a t e d C i r c u i t S y s t e m s, I n c .
●
Revised 30Nov2004
Networking & Communications
●
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●
tel (508) 852-5400
V
EE
OE
NC
•
Stable, ultra low jitter, LVDS clock generation
•
For Gigabit Ethernet, Fibre Channel, PCI-Express,
other applications
•
Clock output frequencies from 75 to 750 MHz
•
One differential LVDS clock output
•
Output Enable
(OE)
pin
(tri-state – with ultra low current – when low)
•
Small 6-pin 5 x 7 x 1.5mm SMT ceramic package
•
Low profile package allows back-side PCB mounting
•
Pb-free RoHS compliant (by default; no additional code required)
•
2.5V or 3.3V device power supply options
•
Commercial
(0 to +70 C) and
Industrial
(-40 to +85 C)
temperatures
•
Frequency stability of ±50 or ±100 ppm
O
O
6
8 M x4
(Top View)
2
5
3
1
4
Integrated
Circuit
Systems, Inc.
P
IN
D
ESCRIPTIONS
1
2
3
4
5
6
OE
NC
V
EE
OUT
nOUT
Input
Unused
Power
Output
Power
No internal terminator
Internal pull-up resistor
Output enable pin. Tri-state – with
ultra low current – when low.
LVCMOS/LVTTL interface levels.
No connect.
Negative supply pin.
Differential clock output connections.
LVDS interface levels.
Power supply pin.
ICS8M
X
4
Crystal Oscillator:
LVPECL C
LOCK
O
UTPUT
PRELI MINARY
Inputs
Outputs
Positive Supply Voltage
Package Thermal Impedence
Storage Temperature
T
S
A
BSOLUTE
M
AXIMUM
R
ATINGS
V
I
-
0.5
to V
DD
+
0.5
V
O
V
DD
-
0.5
to V
DD
+
0.5
4.6
TBD
V
V
V
°C/W (0 lfpm)
o
-
40
to +
100
C
V
DD
For typical value of internal pull-up resistor, see DC Characteristics
.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent
damage to the device. These ratings are stress specifications only. Functional operation of
product at these conditions or any conditions beyond those listed in DC Characteristics, or
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
P
ARAMETER
M
EASUREMENT
I
NFORMATION
SCOPE
Qx
3.3V+ 5%
Power Supply
POWER SUPPLY
2.5V+ 5%
Power Supply
POWER SUPPLY
SCOPE
Qx
Float GND
Float GND
+
Float GND
Float GND
-
LVDS
nQx
+
-
LVDS
nQx
3.3V Output Load AC Test Circuit
2.5V Output Load AC Test Circuit
nOUT
Phase Noise Plot
Noise Power
OUT
t
PW
(Output Pulse Width)
t
PERIOD
odc =
t
PW
t
PERIOD
Output Duty Cycle / Pulse WIdth / Period
V
DD
f
1
Offset Frequency
f
2
Clock
Outputs
20%
80%
80%
20%
t
F
V
OD
Differential
Voltage
RMS Jitter = Area Under Offset Frequency Markers
t
R
V
OS
Offset Voltage
RMS Phase Jitter
GND
Output Rise and Fall Time
ICS8Mx4 Datasheet Rev A
I n t e g r a t e d C i r c u i t S y s t e m s, I n c .
●
2 of 4
Networking & Communications
●
Revised 30Nov2004
w w w. i c s t . c o m
●
tel (508) 852-5400
Integrated
Circuit
Systems, Inc.
P
ARAMETER
M
EASUREMENT
I
NFORMATION
(C
ONTINUED
)
ICS8M
X
4
Crystal Oscillator:
LVPECL C
LOCK
O
UTPUT
PRELI MINARY
V
DD
➤
➤
V
DD
out
out
DC Input
LVDS
➤
DC Input
100
V
OD
/∆ V
OD
out
LVDS
out
➤
I
OSD
Differential Output Voltage Setup
Differential Output Short Circuit Current Setup
V
DD
V
DD
out
➤
V
DD
out
➤
I
OS
DC Input
LVDS
out
➤
DC Input
LVDS
I
OSB
out
➤
V
OS
/∆ V
OS
➤
Offset Voltage Setup
Output Short Circuit Current Setup
LVDS
I
OFF
➤
V
DD
V
DD
Power Off Leakage Setup
A
PPLICATION
I
NFORMATION
T
ERMINATION FOR
3.3V LVDS D
RIVER
A general LVDS interface is shown in
Figure 1.
In a 100W differential transmis-
sion line environment, LVDS drivers require a matched load termination of 100W
across near the receiver input. For a multiple LVDS outputs buffer, if only partial
outputs are used, it is recommended to terminate the un-used outputs.
3.3V
3.3V
T
ERMINATION FOR
2.5V LVDS D
RIVER
Figure 2
shows a typical termination for LVDS driver in characteristic impedance
of 100Ω differential (50Ω single) transmission line environment. For buffer with
multiple LDVS driver, it is recommended to terminate the unused outputs.
3.3V
3.3V
3.3V
2.5V
3.3V
2.5V
LVDS Driver
LVDS
+
R1
100
LVDS Driver
LVDS
+
R1
100
-
-
100Ω Differential
Transmission Line
100 Ohm Differential
Transmission Line
Figure 1: Typical 3.3V LVDS Driver Termination
100Ω Differential
Transmission Line
100 Ohm Differential
Transmission Line
Figure 2: Typical 3.3V LVDS Driver Termination
ICS8Mx4 Datasheet Rev A
I n t e g r a t e d C i r c u i t S y s t e m s, I n c .
●
3 of 4
Networking & Communications
●
Revised 30Nov2004
w w w. i c s t . c o m
●
tel (508) 852-5400
Integrated
Circuit
Systems, Inc.
ICS8M
X
4
Crystal Oscillator:
LVPECL C
LOCK
O
UTPUT
PRELI MINARY
D
EVICE
P
ACKAGE
O
UTLINE
-
6-pin, 5 x 7 x 1.5mm SMT CERHERMETIC
SYMBOL
DIMENSION IN MM
NOMINAL TOLERANCE
A
B
C
D
1
D
2
E
F
G
H
J
5
7
1.5
2.54
5.08
2.6
0.6
1.4
0.15 Ref.
0.65 Ref.
± 0.15
± 0.15
± 0.15
± 0.13
± 0.13
± 0.13
± 0.13
± 0.13
_
_
Device Package Outline
O
RDERING
I
NFORMATION
Part Number:
Device
Supply Voltage & Frequency Accuracy
ICS8M
x
4 -fff.fff
r p t u
G=
H=
J=
K=
3.3V
3.3V
2.5/3.3V
2.5/3.3V
±
50 ppm
±100
ppm
±
50 ppm
±100
ppm
E
XAMPLE
O
UTPUT
F
REQUENCIES
75.000
100.000
106.250
125.000
150.000
155.520
156.250
187.500
200.000
212.500
250.000
311.040
312.500
500.000
600.000
622.080
625.000
750.000
Consult ICS for the availability of other frequencies
E
XAMPLE
P
ART
N
UMBERS
Part/Order Number
For option ...
Marking
3.3 V
106.25 MHz
(blank)
Commercial
±50 ppm
Output Type
4 = LVDS
Output Frequency (MHz)
Leading zeroes dropped. Fourth decimal place added if
necessary. See Standard Output Frequencies on right.
Consult ICS for other frequencies.
Revision of Product
A = Initial Release
Package Type (individual devices)
J = 5x7mm ceramic SMT
Ambient Temperature Range
ICS8MG4-106.250AJ
8MG4-106.250
(blank)
Tube (60 per tube)
2.5/3.3 V
625.00 MHz
±100 ppm
none = commercial = 0 to +70
o
C
I
= industrial = -40 to +85
o
C
none = tube (60 devices per tube)
T = tape and reel (1000 devices)
Bulk Packaging option
ICS8MK4-625.000AJ
I
T
8MK4-625.000
Industrial
Tape & Reel
(1000)
Note: Lead-free by default (no additional “LF” code needed)
(Pb-free and RoHS compliant)
ICS8Mx4 Datasheet Rev A
I n t e g r a t e d C i r c u i t S y s t e m s, I n c .
●
4 of 4
Networking & Communications
●
Revised 30Nov2004
w w w. i c s t . c o m
●
tel (508) 852-5400
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