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TM-056-LBC-A-K2A3K2K2

Description
Telecom IC, MDIP18,
CategoryWireless rf/communication    Telecom circuit   
File Size2MB,7 Pages
ManufacturerVectron International, Inc.
Websitehttp://www.vectron.com/
Environmental Compliance
Download Datasheet Parametric View All

TM-056-LBC-A-K2A3K2K2 Overview

Telecom IC, MDIP18,

TM-056-LBC-A-K2A3K2K2 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Objectid108426748
package instructionDIP, DIP18,1.6,200
Reach Compliance Codecompliant
JESD-30 codeR-MDIP-T18
Number of terminals18
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialMETAL
encapsulated codeDIP
Encapsulate equivalent codeDIP18,1.6,200
Package shapeRECTANGULAR
Package formIN-LINE
power supply3.3 V
Certification statusNot Qualified
Nominal supply voltage3.3 V
surface mountNO
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal pitch5.08 mm
Terminal locationDUAL
TM-056
Integrated Timing Solution
The TM-056 is a compact Timing Module, which functions as a complete system clock solution for general Stratum 3/3E timing applications. The
ns
gen
TM-056 uses Vectron’s Digital and Analog Phase Locked Loop (DPLL and APLL) technology and can lock to 2 re
cked
ca
reference frequencies automatically.
om
interfa
comp
The module has dual output clocks ranging from 8 kHz to 77.76 MHz. Simple control interface with comprehensive state engine, status and
alarm indications and fully automatic operation
makes
seamless
system integration of t
TM-056 module.
eration
ation
the
m
Features
• Single module Statum 3/3E synchronization solution.
• Complies with Telcordia GR-1244/GR-253 and ITU-T G.812/G.813
recommendations.
• Supports Free-run, Holdover and Lock modes.
• Accepts 2 reference inputs from frequency range 8kHz to 77.76MHz.
• Continuously monitors and evaluates both input reference signals
simultaneously.
• Provides two synchronized outputs with frequency range up to 77.76MHz.
• On board OCXO that provides excellent stability in Freerun and Holdover
mode.
• Loop filtering utilizing DPLL.
• Automatic “hit-less” switchover on loss of input.
• Holdover mode with 90 seconds of history.
• Several alarms and status signals.
• Simple control interface and JTAG port for factory programming.
• Small dimensions 1.9” x 1.9” x 0.55”
.
• Product is compliant to RoHS directive and fully compatible with lead free
assembly.
r
m
i
l
e
Block Diagram
OCXO
DPLL
APLL
CPU
n
i
Applications
Multi-service Switches and Routers
ATM
Gateway
Access
EDGE
Core
SONET
SDH
DWDM
EX REF 1
EX REF 2
Reference
Monitor
and
Selection
Output
Dividers
OUT 1
OUT 2
CNT 1
CNT 2
HOLDOVER
REF 1
REF 2
FREERUN
ALARM
UNLOCK
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com
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