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74AC11032NE4

Description
Logic Gates Quadruple 2-Input Positive-OR Gates
Categorylogic    logic   
File Size1MB,23 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
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74AC11032NE4 Overview

Logic Gates Quadruple 2-Input Positive-OR Gates

74AC11032NE4 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerTexas Instruments
Parts packaging codeDIP
package instructionDIP, DIP16,.3
Contacts16
Reach Compliance Codeunknow
Other featuresCENTER PIN VCC AND GND
seriesAC
JESD-30 codeR-PDIP-T16
JESD-609 codee4
length19.305 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeOR GATE
MaximumI(ol)0.024 A
Number of functions4
Number of entries2
Number of terminals16
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3/5 V
Prop。Delay @ Nom-Su9.7 ns
propagation delay (tpd)5.9 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Base Number Matches1

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Description Logic Gates Quadruple 2-Input Positive-OR Gates Logic Gates Quad 2-Input Pos- OR Gate Logic Gates Quad 2-Input Pos- OR Gate a Phase-Dimmable, Primary-Side Regulated LED Driver Performance Demonstration Kit for the ADS130E08 Logic Gates Quad 2-Input Pos- OR Gate Logic Gates Quadruple 2-Input Positive-OR Gates
Is it lead-free? Lead free Lead free Lead free - - Lead free Lead free
Is it Rohs certified? conform to conform to conform to - - conform to conform to
Maker Texas Instruments Texas Instruments Texas Instruments - - Texas Instruments Texas Instruments
Parts packaging code DIP SOIC SOIC - - SOIC SOIC
package instruction DIP, DIP16,.3 SOP, SOP16,.25 SSOP, SSOP16,.3 - - SOP, SOP16,.3 SOP, SOP16,.3
Contacts 16 16 16 - - 16 16
Reach Compliance Code unknow unknow unknow - - unknow unknown
Other features CENTER PIN VCC AND GND CENTER PIN VCC AND GND CENTER PIN VCC AND GND - - CENTER PIN VCC AND GND CENTER PIN VCC AND GND
series AC AC AC - - AC AC
JESD-30 code R-PDIP-T16 R-PDSO-G16 R-PDSO-G16 - - R-PDSO-G16 R-PDSO-G16
JESD-609 code e4 e4 e4 - - e4 e4
length 19.305 mm 9.9 mm 6.2 mm - - 10.2 mm 10.2 mm
Load capacitance (CL) 50 pF 50 pF 50 pF - - 50 pF 50 pF
Logic integrated circuit type OR GATE OR GATE OR GATE - - OR GATE OR GATE
MaximumI(ol) 0.024 A 0.024 A 0.024 A - - 0.024 A 0.024 A
Number of functions 4 4 4 - - 4 4
Number of entries 2 2 2 - - 2 2
Number of terminals 16 16 16 - - 16 16
Maximum operating temperature 85 °C 85 °C 85 °C - - 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C - - -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code DIP SOP SSOP - - SOP SOP
Encapsulate equivalent code DIP16,.3 SOP16,.25 SSOP16,.3 - - SOP16,.3 SOP16,.3
Package shape RECTANGULAR RECTANGULAR RECTANGULAR - - RECTANGULAR RECTANGULAR
Package form IN-LINE SMALL OUTLINE SMALL OUTLINE, SHRINK PITCH - - SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED 260 260 - - 260 260
power supply 3.3/5 V 3.3/5 V 3.3/5 V - - 3.3/5 V 3.3/5 V
Prop。Delay @ Nom-Su 9.7 ns 9.7 ns 9.7 ns - - 9.7 ns -
propagation delay (tpd) 5.9 ns 9.7 ns 9.7 ns - - 9.7 ns 9.7 ns
Certification status Not Qualified Not Qualified Not Qualified - - Not Qualified Not Qualified
Schmitt trigger NO NO NO - - NO NO
Maximum seat height 5.08 mm 1.75 mm 2 mm - - 2 mm 2 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V - - 5.5 V 5.5 V
Minimum supply voltage (Vsup) 3 V 3 V 3 V - - 3 V 3 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V - - 5 V 5 V
surface mount NO YES YES - - YES YES
technology CMOS CMOS CMOS - - CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL - - INDUSTRIAL INDUSTRIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) - - Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form THROUGH-HOLE GULL WING GULL WING - - GULL WING GULL WING
Terminal pitch 2.54 mm 1.27 mm 0.65 mm - - 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL - - DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED - - NOT SPECIFIED NOT SPECIFIED
width 7.62 mm 3.9 mm 5.3 mm - - 5.3 mm 5.3 mm
Base Number Matches 1 1 1 - - 1 1
Humidity sensitivity level - 1 1 - - 1 1
method of packing - TAPE AND REEL TAPE AND REEL - - TAPE AND REEL TAPE AND REEL
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