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5962R9579101VRC

Description
D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20
Categorylogic    logic   
File Size221KB,9 Pages
ManufacturerHarris
Websitehttp://www.harris.com/
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5962R9579101VRC Overview

D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20

5962R9579101VRC Parametric

Parameter NameAttribute value
package instruction,
Reach Compliance Codeunknow
seriesHC/UH
JESD-30 codeR-CDIP-T20
JESD-609 codee4
Load capacitance (CL)50 pF
Logic integrated circuit typeD FLIP-FLOP
Number of digits8
Number of functions1
Number of terminals20
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityTRUE
Package body materialCERAMIC, METAL-SEALED COFIRED
Package shapeRECTANGULAR
Package formIN-LINE
propagation delay (tpd)27 ns
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formTHROUGH-HOLE
Terminal locationDUAL
total dose100k Rad(Si) V
Trigger typePOSITIVE EDGE
Base Number Matches1

5962R9579101VRC Related Products

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Description D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20 D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDFP20 D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, DIE-20 D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20 D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDFP20 D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDFP20 D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20
Reach Compliance Code unknow unknown unknown unknown unknown unknown unknown unknown
series HC/UH HC/UH HC/UH HC/UH HC/UH HC/UH HC/UH HC/UH
JESD-30 code R-CDIP-T20 X-XUUC-N20 R-CDFP-F20 X-XUUC-N20 R-CDIP-T20 R-CDFP-F20 R-CDFP-F20 R-CDIP-T20
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP
Number of digits 8 8 8 8 8 8 8 8
Number of functions 1 1 1 1 1 1 1 1
Number of terminals 20 20 20 20 20 20 20 20
Output polarity TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE
Package body material CERAMIC, METAL-SEALED COFIRED UNSPECIFIED CERAMIC, METAL-SEALED COFIRED UNSPECIFIED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
Package shape RECTANGULAR UNSPECIFIED RECTANGULAR UNSPECIFIED RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE UNCASED CHIP FLATPACK UNCASED CHIP IN-LINE FLATPACK FLATPACK IN-LINE
propagation delay (tpd) 27 ns 27 ns 27 ns 27 ns 27 ns 27 ns 27 ns 27 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount NO YES YES YES NO YES YES NO
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Terminal form THROUGH-HOLE NO LEAD FLAT NO LEAD THROUGH-HOLE FLAT FLAT THROUGH-HOLE
Terminal location DUAL UPPER DUAL UPPER DUAL DUAL DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
JESD-609 code e4 - e4 e0 - e0 - e0
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C - 125 °C - 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C - -55 °C - -55 °C
Temperature level MILITARY MILITARY MILITARY MILITARY - MILITARY - MILITARY
Terminal surface GOLD - GOLD TIN LEAD - Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb)
total dose 100k Rad(Si) V - 100k Rad(Si) V 100k Rad(Si) V - 200k Rad(Si) V - 200k Rad(Si) V
Base Number Matches 1 1 1 1 1 - - -
Maker - Harris - Harris Harris Harris Harris Harris

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