HCS273KMSR datasheet, PDF - EEWORLD Datasheet

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HCS273KMSR: DescriptionD Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDFP20; Categorylogic logic; File Size221KB，9 Pages; ManufacturerHarris; Websitehttp://www.harris.com/

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HCS273KMSR Overview

D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDFP20

HCS273KMSR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Harris
package instruction	DFP, FL20,.3
Reach Compliance Code	unknown
Other features	RADIATION HARD CMOS/SILICON ON SAPPHIRE (SOS) TECHNOLOGY
series	HC/UH
JESD-30 code	R-CDFP-F20
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	D FLIP-FLOP
MaximumI(ol)	0.006 A
Number of digits	8
Number of functions	1
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DFP
Encapsulate equivalent code	FL20,.3
Package shape	RECTANGULAR
Package form	FLATPACK
power supply	5 V
propagation delay (tpd)	27 ns
Certification status	Not Qualified
Filter level	38535V;38534K;883S
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
total dose	200k Rad(Si) V
Trigger type	POSITIVE EDGE

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HCS273KMSR Related Products

	HCS273KMSR	HCS273HMSR	5962R9579101VRC	5962R9579101VXC	5962R9579101V9A	HCS273D/SAMPLE	HCS273K/SAMPLE	HCS273DMSR
Description	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDFP20	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDFP20	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, DIE-20	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDFP20	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, CDIP20
Reach Compliance Code	unknown	unknown	unknow	unknown	unknown	unknown	unknown	unknown
series	HC/UH	HC/UH	HC/UH	HC/UH	HC/UH	HC/UH	HC/UH	HC/UH
JESD-30 code	R-CDFP-F20	X-XUUC-N20	R-CDIP-T20	R-CDFP-F20	X-XUUC-N20	R-CDIP-T20	R-CDFP-F20	R-CDIP-T20
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
Number of digits	8	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1	1
Number of terminals	20	20	20	20	20	20	20	20
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	UNSPECIFIED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
Package shape	RECTANGULAR	UNSPECIFIED	RECTANGULAR	RECTANGULAR	UNSPECIFIED	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	FLATPACK	UNCASED CHIP	IN-LINE	FLATPACK	UNCASED CHIP	IN-LINE	FLATPACK	IN-LINE
propagation delay (tpd)	27 ns	27 ns	27 ns	27 ns	27 ns	27 ns	27 ns	27 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	NO	YES	YES	NO	YES	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Terminal form	FLAT	NO LEAD	THROUGH-HOLE	FLAT	NO LEAD	THROUGH-HOLE	FLAT	THROUGH-HOLE
Terminal location	DUAL	UPPER	DUAL	DUAL	UPPER	DUAL	DUAL	DUAL
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
Maker	Harris	Harris	-	-	Harris	Harris	Harris	Harris
JESD-609 code	e0	-	e4	e4	e0	-	-	e0
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	-	-	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C	-55 °C	-55 °C	-	-	-55 °C
Temperature level	MILITARY	MILITARY	MILITARY	MILITARY	MILITARY	-	-	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)	-	GOLD	GOLD	TIN LEAD	-	-	Tin/Lead (Sn/Pb)
total dose	200k Rad(Si) V	-	100k Rad(Si) V	100k Rad(Si) V	100k Rad(Si) V	-	-	200k Rad(Si) V
Base Number Matches	-	1	1	1	1	1	-	-

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