Multi-Port SRAM, 2KX9, 55ns, CMOS, CQCC52
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Objectid | 101265140 |
| Reach Compliance Code | unknown |
| ECCN code | EAR99 |
| Maximum access time | 55 ns |
| I/O type | COMMON |
| JESD-30 code | S-XQCC-N52 |
| JESD-609 code | e0 |
| memory density | 18432 bit |
| Memory IC Type | MULTI-PORT SRAM |
| memory width | 9 |
| Number of ports | 2 |
| Number of terminals | 52 |
| word count | 2048 words |
| character code | 2000 |
| Operating mode | ASYNCHRONOUS |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 2KX9 |
| Output characteristics | 3-STATE |
| Package body material | CERAMIC |
| encapsulated code | QCCN |
| Encapsulate equivalent code | LCC52,.75SQ |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Parallel/Serial | PARALLEL |
| power supply | 5 V |
| Certification status | Not Qualified |
| Maximum standby current | 0.0015 A |
| Minimum standby current | 2 V |
| Maximum slew rate | 0.16 mA |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | NO LEAD |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
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