AT45DB021E-SSHNHC-T datasheet, PDF

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AT45DB021E-SSHNHC-T: Descriptionflash 2mb, 1.65v, 70mhz serial flash; Categorysemiconductor Other integrated circuit (IC); File Size2MB，68 Pages; ManufacturerAll Sensors; Environmental Compliance

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AT45DB021E-SSHNHC-T Overview

flash 2mb, 1.65v, 70mhz serial flash

AT45DB021E-SSHNHC-T Parametric

Parameter Name	Attribute value
Manufacture	Adesto Technologies
Product Category	Flash
RoHS	Yes
Memory Type	Serial Flash
Memory Size	2 Mbi
Interface Type	SPI
Access Time	6 ns
Supply Voltage - Max	3.6 V
Supply Voltage - Mi	1.65 V
Operating Temperature	- 40 C to + 85 C
Mounting Style	SMD/SMT
Package / Case	SOIC-8
Packaging	Reel
Maximum Clock Frequency	85 MHz

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AT45DB021E

2-Mbit DataFlash (with Extra 64-Kbits), 1.65V Minimum

SPI Serial Flash Memory

Features



Single 1.65V - 3.6V supply



Serial Peripheral Interface (SPI) compatible



Supports SPI modes 0 and 3



Supports RapidS

™

operation

Continuous read capability through entire array



Up to 85MHz



Low-power read option up to 15MHz



Clock-to-output time (t

) of 6ns maximum

User configurable page size



256 bytes per page



264 bytes per page (default)



Page size can be factory pre-configured for 256 bytes

One SRAM data buffer (256/264 bytes)

Flexible programming options



Byte/Page Program (1 to 256/264 bytes) directly into main memory



Buffer Write



Buffer to Main Memory Page Program

Flexible erase options



Page Erase (256/264 bytes)



Block Erase (2KB)



Sector Erase (32KB)



Chip Erase (2-Mbits)

Advanced hardware and software data protection features



Individual sector protection



Individual sector lockdown to make any sector permanently read-only

128-byte, One-Time Programmable (OTP) Security Register



64 bytes factory programmed with a unique identifier



64 bytes user programmable

Hardware and software controlled reset options

JEDEC Standard Manufacturer and Device ID Read

Low-power dissipation



200nA Ultra-Deep Power-Down current (typical)



3μA Deep Power-Down current (typical)



25μA Standby current (typical at 20MHz)



4.5mA Active Read current (typical)

Endurance: 100,000 program/erase cycles per page minimum

Data retention: 20 years

Complies with full industrial temperature range

Green (Pb/Halide-free/RoHS compliant) packaging options



8-lead SOIC (0.150ʺ wide and 0.208" wide)



8-pad Ultra-thin DFN (5 x 6 x 0.6mm)



9-ball Ultra-thin UBGA (6 x 6 x 0.6mm)



8789E–DFLASH–10/2013

Table 1-1.

Pin Configurations

Asserted

State

Symbol

Name and Function

Chip Select:

Asserting the CS pin selects the device. When the CS pin is deasserted, the

device will be deselected and normally be placed in the standby mode (not Deep Power-Down

mode) and the output pin (SO) will be in a high-impedance state. When the device is

deselected, data will not be accepted on the input pin (SI).

A high-to-low transition on the CS pin is required to start an operation and a low-to-high

transition is required to end an operation. When ending an internally self-timed operation such

as a program or erase cycle, the device will not enter the standby mode until the completion of

the operation.

Serial Clock:

This pin is used to provide a clock to the device and is used to control the flow of

data to and from the device. Command, address, and input data present on the SI pin is

always latched on the rising edge of SCK, while output data on the SO pin is always clocked

out on the falling edge of SCK.

Serial Input:

The SI pin is used to shift data into the device. The SI pin is used for all data input

including command and address sequences. Data on the SI pin is always latched on the rising

edge of SCK. Data present on the SI pin will be ignored whenever the device is deselected (CS

is deasserted).

Serial Output:

The SO pin is used to shift data out from the device. Data on the SO pin is

always clocked out on the falling edge of SCK. The SO pin will be in a high-impedance state

whenever the device is deselected (CS is deasserted).

Write Protect:

When the WP pin is asserted, all sectors specified for protection by the Sector

Protection Register will be protected against program and erase operations regardless of

whether the Enable Sector Protection command has been issued or not. The WP pin functions

independently of the software controlled protection method. After the WP pin goes low, the

contents of the Sector Protection Register cannot be modified.

Type

Low

Input

SCK

—

Input

—

Input

—

Output

If a program or erase command is issued to the device while the WP pin is asserted, the device

will simply ignore the command and perform no operation. The device will return to the idle

state once the CS pin has been deasserted. The Enable Sector Protection command and the

Sector Lockdown command will be recognized by the device when the WP pin is asserted.

The WP pin is internally pulled-high and may be left floating if hardware controlled protection

will not be used. However, it is recommended that the WP pin also be externally connected to

whenever possible.

Reset:

A low state on the reset pin (RESET) will terminate the operation in progress and reset

the internal state machine to an idle state. The device will remain in the reset condition as long

as a low level is present on the RESET pin. Normal operation can resume once the RESET pin

is brought back to a high level.

The device incorporates an internal power-on reset circuit, so there are no restrictions on the

RESET pin during power-on sequences. If this pin and feature is not utilized, then it is

recommended that the RESET pin be driven high externally.

Low

Input

RESET

Low

Input

GND

Device Power Supply:

The V

pin is used to supply the source voltage to the device.

Operations at invalid V

voltages may produce spurious results and should not be attempted.

Ground:

The ground reference for the power supply. GND should be connected to the system

ground.

—

Power

Ground

AT45DB021E

8789E–DFLASH–10/2013

AT45DB021E-SSHNHC-T Related Products

	AT45DB021E-SSHNHC-T	AT45DB021E-SSHNHA-T	AT45DB021E-SHNHA-T	AT45DB021E-SHNHC-T
Description	flash 2mb, 1.65v, 70mhz serial flash	flash 2mb, 1.65v, 70mhz serial flash	flash 2mb, 1.65v, 70mhz serial flash	flash 2mb, 1.65v, 70mhz serial flash
Manufacture	Adesto Technologies	Adesto Technologies	Adesto Technologies	Adesto Technologies
Product Category	Flash	Flash	Flash	Flash
RoHS	Yes	Yes	Yes	Yes
Memory Type	Serial Flash	Serial Flash	Serial Flash	Serial Flash
Memory Size	2 Mbi	2 Mbi	2 Mbi	2 Mbi
Interface Type	SPI	SPI	SPI	SPI
Access Time	6 ns	6 ns	6 ns	6 ns
Supply Voltage - Max	3.6 V	3.6 V	3.6 V	3.6 V
Supply Voltage - Mi	1.65 V	1.65 V	1.65 V	1.65 V
Operating Temperature	- 40 C to + 85 C	- 40 C to + 85 C	- 40 C to + 85 C	- 40 C to + 85 C
Mounting Style	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT
Package / Case	SOIC-8	SOIC-8	SOIC-8	SOIC-8
Packaging	Reel	Reel	Reel	Reel
Maximum Clock Frequency	85 MHz	85 MHz	85 MHz	85 MHz

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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