21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2409
Zero-Delay Clock Buffer
Product Features
•
•
•
•
Maximum rated frequency: 133 MHz
Low cycle-to-cycle jitter
Input to output delay, less than 200ps
Internal feedback allows outputs to be synchronized
to the clock input
•
Operates at 3.3V V
DD
•
Space-saving Packages:
150-mil SOIC (W)
173-mil TSSOP (L)
Functional Description
The PI6C2409 is a PLL based, zero-delay buffer, with the ability
to distribute nine outputs of up to 133MHz at 3.3V.
All the outputs are distributed from a single clock input CLKIN and
output OUT0 performs zero delay by connecting a feedback to PLL.
PI6C2409 has two banks of four outputs that can be controlled by
the selection inputs, SEL1 & SEL2. It also has a powersparing feature:
when input SEL1 is 0 and SEL2 is 1, PLL is turned off and all
outputs are referenced from CLKIN. PI6C2409 is available in
high drive and industrial environment versions.
An internal feedback on OUT0 is used to synchronize the
outputs to the input; the relationship between loading of this signal
and the outputs determines the input-output delay.
PI6C2409 are characterized for both commercial and
industrial operation
Block Diagram
OUT0
CLKIN
PLL
MUX
OUTA1
OUTA2
OUTA3
SEL1
SEL2
Decode
Logic
OUTA4
OUTB1
OUTB2
PI6C2409(-1, -1H)
OUTB3
OUTB4
Pin Configuration
CLKIN
OUTA1
OUTA2
VDD
GND
OUTB1
OUTB2
SEL2
1
2
3
4
5
6
7
8
16
15
16-Pin
14
W, L
13
12
11
10
9
OUT0
OUTA4
OUTA3
VDD
GND
OUTB4
OUTB3
SEL1
1
PS8613A
07/15/03
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2409
Zero Delay Clock Buffer
Input Select Decoding
SEL2
0
0
1
1
SEL1
0
1
0
1
OUTA [1-4]
3- State
PLL
CLK IN
PLL
OUTB [1-4]
3- State
3- State
CLK IN
PLL
Output Source
(OUT0)
PLL
PLL
CLK IN
PLL
PLL
ON
ON
O FF
ON
Pin Description
Pin
1
2, 3, 14, 15
4, 13
5, 12
6, 7, 10 ,11
8
9
16
C LK IN
O UTA[1- 4]
V
DD
GN D
O UTB[1- 4]
SEL2
SEL1
O UT0
Signal
C lock outputs, Bank A
3.3V supply
Ground
C lock outputs, Bank B
Select input, bit 2 (weak pull- up)
Select input, bit 1 (weak pull- up)
C lock O utput , internal PLL feedback
D e s cription
Input clock reference frequency (weak pull- down)
2
PS8613A
07/15/03
CLKIN - Input to OUTx Delay (ps)
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2409
Zero Delay Clock Buffer
Zero Delay and Skew Control
CLKIN Input to OUTx Delay vs. Difference in Loading between OUT0 pin and OUTx pins
800
600
400
200
0
-200
-400
-600
-800
-900
PI6C2409-1
PI6C2409-1H
-25
-20
-15
-10
-5
0
5
10
15
20
25
-1000
Output Load Difference: OUT0 Load - OUTx Load (pF)
The relationship between loading of the OUT0 signal and other outputs determines the input-output delay. Zero delay is achieved when
all outputs, including feedback, are loaded equally.
Maximum Ratings
Supply Voltage to Ground Potential ............................................................................................................................. –0.5V to +7.0V
DC Input Voltage (Except CLKIN) ........................................................................................................................ –0.5V to V
DD
+0.5V
DC Input Voltage CLKIN ...................................................................................................................................................... –0.5 to 7V
Storage Temperature ................................................................................................................................................... –65ºC to +150ºC
Maximum Soldering Temperature (10 seconds) ........................................................................................................................... 260ºC
Junction Temperature .................................................................................................................................................................. 150ºC
Static Discharge Voltage (per MIL-STD-883, Method 3015) .................................................................................................... >2000V
Operating Conditions
(V
CC
= 3.3V ±0.3V)
Parame te r
V
DD
T
A
C
L
C
IN
Supply Voltage
Commerical Operating Temperature
Industrial Operating Temperature
Load Capacitance, below 100 MHz
Load Capacitance, from 100 MHz to 133 MHz
Input Capacitance
De s cription
M in.
3.0
0
–40
M a x.
3.6
70
85
30
15
7
pF
Units
V
ºC
3
PS8613A
07/15/03
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2409
Zero Delay Clock Buffer
DC Electrical Characteristics for Industrial Temperature Devices
Parame te r
V
IL
V
IH
I
IL
I
IH
V
O L
V
O H
I
DD
I
DD
De s cription
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Bypass, PLL OFF
Supply Current
V
IN
= 0V
V
IN
= V
DD
I
O L
= 8mA (–1); I
O L
= 12mA (–1H)
I
O H
= –8mA (–1); I
O H
= –12mA (–1H)
SEL1 = 0, SEL2 = 1
Unloaded outputs 100 MHz, Select inputs at V
DD
or GND
Unloaded outputs 66 MHz, CLKIN
2.4
1.0
54.0
39.0
2.0
50.0
125
0.4
Te s t Conditions
M in.
M a x.
0.8
Units
V
µA
V
mA
mA
AC Electrical Characteristics for Industrial Temperature Devices
Parame te rs
F
O
t
DC
t
R
t
F
t
SK(O)
t
0
t
SK(D)
t
SLEW
t
JIT
t
LOCK
N ame
O utput Frequency
Duty C ycle
(1)
(–1, –1H)
Duty C ycle
(1)
(–1H)
Rise Time
(1)
(–1)
Rise Time
(1)
(–1H)
Fall Time
(1)
(–1)
Fall Time
(1)
(–1H)
O utput to O utput Skew
(–1,–1H)
(1)
Delay, C LK IN Rising Edge
to O UT0 Rising Edge
(1)
(–1, –1H)
Device- to- Device Skew
(1)
(–1, –1H)
O utput Slew Rate
(1)
(–1, –1H)
C ycle- to- C ycle Jitter
(1)
(–1,–1H)
PLL Lock Time
(1)
(–1, –1H)
Te s t Conditions
30pF load (–1, –1H)
10pF load, (–1, –1H)
Measured at V
DD
/2, F
OUT
= 66.67MHz
Measured at V
DD
/2V, F
OUT
<50MHz
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
All outputs equally loaded
Measured at V
DD
/2
Measured at V
DD
/2 on O UT0 pins of devices
Measured between 0.8V & 2.0V on –1H device
using Test C rt #2
Measured at 66.67 MHz, loaded 30pF load
Stable power supply, valid clocks
presented on C LK IN pin
1
200
1.0
0
0
M in.
10.0
40.0
45.0
50
Typ.
M ax. Units
100
133
60.0
55.0
2.5
1.5
2.5
1.5
250
ns
MHz
%
± 350
700
ps
V/ns
ps
ms
Notes:
1.See Switching Waveforms on page 6.
4
PS8613A
07/15/03
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2409
Zero Delay Clock Buffer
DC Electrical Characteristics for Commercial Temperature Devices
Parame te r
V
IL
V
IH
I
IL
I
IH
V
O L
V
O H
I
DD
I
DD
I
DD
De s cription
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Bypass, PLL off
Supply Current
Supply Current
V
IN
= 0V
V
IN
= V
DD
I
O L
= 8mA (–1); I
O L
= 12mA (–1H)
I
O H
= –8mA (–1); I
O H
= –12mA (–1H)
SEL1 = 0 SEL2 = 1
Unloaded outputs, 66.67 MHz, Select inputs at V
DD
or GND
Unloaded outputs 100 MHz Select Inputs @ V
DD
or GND
Te s t Conditions
M in.
2.0
2.4
M a x.
0.8
50
125
0.4
1.0
39
54
mA
Units
V
µA
V
AC Electrical Characteristics for Commercial Temperature Device
Parame te rs
F
O
t
DC
t
R
t
F
t
S K (O )
t
0
N ame
1
O utput Frequency
Duty C ycle (–1H)
Duty C ycle (–1,–1H)
Rise Time (–1)
Rise Time (–1H)
Fall Time (–1)
Fall Time (–1H)
O utput to O utput Skew (–1,–1H)
Input to O utput Delay, C LK IN
Rising Edge to O UT0 Rising Edge
(–1,–1H)
Device to Device Skew (–1,–1H)
O utput Slew Rate (–1,–1H)
C ycle- to- C ycle Jitter (–1,–1H)
PLL Lock Time (–1,–1H)
All outputs equally loaded, V
DD
/2
Measured at V
DD
/2
Measured at V
DD
/2 on O UT0 pins of devices
Measured between 0.8V and 2.0V on –1H
device using Test C ircuit #2
Measured at 66.67 MHz, loaded 30pF outputs
Stable power supply, valid clocks
presented on C LK IN pins
1
200
1.0
0
0
Measured between 0.8V and 2.0V
Te s t Conditions
30pF load (–1, –1H)
10pF load, (–1, –1H)
Measured at V
DD
/2, F
O
< 50 MHz
Measured at V
DD
/2, F
O
= 66 MHz
M in.
10
45
40
50
50
Typ.
M ax. Units
100
133
55
60
2.5
1.5
2.5
1.5
250
± 350
700
V/ns
ps
ms
ps
ns
MHz
%
t
S K (D)
t
S LEW
t
JIT
t
LO C K
Notes:
1. See Switching Waveforms on page 6
5
PS8613A
07/15/03
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