ZN5450J datasheet, PDF - EEWORLD Datasheet

ZN5450J: DescriptionAND-OR-Invert Gate, TTL, CDIP14; Categorylogic logic; File Size133KB，3 Pages; ManufacturerFerranti Electric Inc

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ZN5450J Overview

AND-OR-Invert Gate, TTL, CDIP14

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Objectid	100796042
package instruction	DIP, DIP14,.3
Reach Compliance Code	unknown
JESD-30 code	R-XDIP-T14
JESD-609 code	e0
Logic integrated circuit type	AND-OR-INVERT GATE
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Certification status	Not Qualified
Schmitt trigger	NO
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

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