eM29SF020A/eM29SF020NA
2 Megabit (256K x 8-bit)
CMOS 5.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE FEATURES
Single 5 Volt read, write, and erase
Manufactured on
0.25
µm
process technology
Extremely low power operations
Data# Polling and Toggle bits
Provide a software method of detecting program
or erase operation completion
Suspend/Resume
10 µA
standby mode
20 mA
read current
30 mA
program/erase current
Fast read
Suspends
a program
or an erase operation to
read data from a sector that is not being
programmed or erased, then resumes the
program or erase operation
Hardware reset pin (RESET#)
Access times as fast as 55 ns
enhanced Manufacturing Throughput (eMT)
Fast page-mode programming
Fast erase without explicit/implicit preprogram
Flexible sector architecture
Provides a hardware method to reset the device
to
reading
array
data(not
available
on
eM29SF020NA)
Sector protection
One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
three 64 Kbyte sectors
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Supports full chip erase
Top or bottom boot block configurations
Embedded Algorithms
Sectors can be locked via programming
equipment
Embedded Program algorithm automatically
writes and verifies data at specified address
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
Temporary sector unprotection
Embedded
Erase
algorithm
automatically
erases the entire chip or any designated sectors
Minimum 10,000 write/erase endurance cycles
guarantee per sector
10-year data retention
Package options
The RESET# pin is used to enable temporary
sector unprotection
(not available on eM29SF020NA)
32-pin TSOP
32-pin PLCC
V1.3
1
2003/03/21
eM29SF020A/eM29SF020NA
GENERAL DESCRIPTION
The eM29F002B is a 2 Megabit, 5.0 Volt-only flash memory
device organized as 262,144 bytes of 8 bits each. The
eM29F002B device is offered in a
32-pin PLCC and a 32-pin
TSOP packages.
This device is designed to be programmed
in-system with a 5.0 V-only V
CC
supply. No V
PP
is required for
write or erase operations. The device can also be
programmed in standard EPROM programmers.
The eM29F002B offers
access times of 55, 70, 90, 120 ns,
allowing operation of high-speed microprocessors without
wait states. Separate chip enable (CE#), write enable (WE#),
and output enable (OE#) are provided to prevent bus
contention.
The command set of eM29SF020A/eM29SF020NA is
compatible with the JEDEC single power supply Flash
standard.
Using standard microprocessor write timings, the
commands are written to the command registers and served
as inputs to an internal state machine, which controls the
programming and erase circuitry.
The program command sequence invokes the Embedded
Program algorithm and then automatically times the program
pulse widths and verifies proper cell margin to program the
eM29F002B.
Erase is accomplished by initiating the erase command
sequence, which invokes the Embedded Erase algorithm and
automatically times the erase pulse widths and verifies proper
cell margin. This device features Sector Erase and Chip
Erase operations. A sector can be erased without affecting
the data contents of other sectors. A sector is typically erased
within 40 ms, no explicit/implicit preprogram is required. The
eM29F002B device is fully erased when shipped from the
factory.
The background program and erase operations can be
achieved since eMemory has implemented the Suspend
feature that enables users to suspend program or erase
operation for any period of time to read data from a sector
that is not selected for programming or erasing.
The Data# Polling bit (DQ7) and the Toggle bit (DQ6) can be
used for monitoring the status of program and erase
operations. Once the program or erase operation is
completed, the device resets itself to reading array data or
accepting another command.
The device features single 5.0-Volt power supply for all
operations. Internally generated and regulated voltages are
provided for both program and erase operations. The
hardware data protection
measures include a low V
CC
detector that automatically inhibits write operations during
power transitions. The
hardware sector protection
disables
both program and erase operations in any combination of the
sectors of memory. This can be achieved via programming
equipment.
The erase suspend and program suspend feature enables
the user to put erase/program on hold for any period of time
to read data from any sector that is not selected for
erase/program.
The
hardware RESET# pin
terminates any operation in
progress and resets the internal state machine to reading
array data. The RESET# pin may be tied to the system reset
circuitry. A system reset would thus also reset the device,
enabling the system microprocessor to read the boot-up
firmware from the Flash memory.(This
feature is not available
on the eM29SF020NA)
The system can place the device into the
standby mode.
Power consumption is greatly reduced in this mode.
-
V1.3
2
2003/03/21
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