SIT9121AI-2B1-33S220.000000T datasheet, PDF

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SIT9121AI-2B1-33S220.000000T: DescriptionCRYSTAL OSCILLATOR, CLOCK, LVDS OUTPUT; CategoryPassive components oscillator; File Size1MB，13 Pages; ManufacturerSiTime; Environmental Compliance

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SIT9121AI-2B1-33S220.000000T Overview

CRYSTAL OSCILLATOR, CLOCK, LVDS OUTPUT

SIT9121AI-2B1-33S220.000000T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	8246981336
package instruction	SOLCC6,.1,43
Reach Compliance Code	compliant
Country Of Origin	Malaysia, Taiwan, Thailand
YTEOL	6.89
Other features	STANDBY; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT
maximum descent time	0.7 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
Installation features	SURFACE MOUNT
Number of terminals	6
Nominal operating frequency	220 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
Output load	100 OHM
Package body material	PLASTIC/EPOXY
Encapsulate equivalent code	SOLCC6,.1,43
physical size	3.2mm x 2.5mm x 0.75mm
power supply	3.3 V
Certification status	Not Qualified
longest rise time	0.7 ns
Maximum slew rate	69 mA
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %

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SiT9121

1 MHz − 220 MHz High Performance Differential Oscillator

Features



Applications



Any frequency between 1 MHz and 220 MHz accurate

to 6 decimal places

LVPECL and LVDS output signaling types

0.6ps RMS phase jitter (random) over 12 kHz to 20 MHz

bandwidth

Frequency stability as low as ±10 ppm

Industrial and extended commercial temperature ranges

Industry-standard packages: 3.2 x 2.5, 5.0 x 3.2 and

7.0 x 5.0 mm x mm

For other frequencies, refer to

SiT9120

and

SiT9122

datasheets



10 GB Ethernet, SONET, SATA, SAS, Fibre Channel,

PCI-Express

Telecom, networking, instrumentation, storage, server

Electrical Characteristics

Table 1. Electrical Characteristics

Parameters

Supply Voltage

Symbol

Vdd

Min.

2.97

2.25

Output Frequency Range

Frequency Stability

F_stab

-10

-20

-25

-50

First Year Aging

10-year Aging

Operating Temperature Range

Input Voltage High

Input Voltage Low

Input Pull-up Impedance

F_aging1

F_aging10

T_use

VIH

VIL

Z_in

-2

-5

-40

-20

70%

–

Start-up Time

Resume Time

Duty Cycle

Current Consumption

OE Disable Supply Current

Output Disable Leakage Current

Standby Current

Maximum Output Current

Output High Voltage

Output Low Voltage

Output Differential Voltage Swing

Rise/Fall Time

OE Enable/Disable Time

RMS Period Jitter

T_start

T_resume

Idd

I_OE

I_leak

I_std

I_driver

VOH

VOL

V_Swing

Tr, Tf

T_oe

T_jitt

–

Vdd-1.1

Vdd-1.9

1.2

–

RMS Phase Jitter (random)

T_phj

–

Typ.

3.3

2.5

–

100

–

1.6

300

–

1.2

0.6

Max.

3.63

2.75

3.63

220

+10

+20

+25

+50

+85

+70

–

30%

250

–

100

Vdd-0.7

Vdd-1.5

2.0

700

115

1.7

0.85

Unit

MHz

ppm

°C

Vdd

kΩ

MΩ

A

25°C

Industrial

Extended Commercial

Pin 1, OE or

Pin 1, OE logic high or logic low, or

logic high

Pin 1,

logic low

Measured from the time Vdd reaches its rated minimum value.

In Standby mode, measured from the time

pin crosses

50% threshold.

Contact SiTime

for tighter duty cycle

Excluding Load Termination Current, Vdd = 3.3V or 2.5V

OE = Low

Inclusive of initial tolerance, operating temperature,

rated power supply voltage, and load variations

Termination schemes in

Figures 1 and 2

- XX ordering code

Condition

LVPECL and LVDS, Common Electrical Characteristics

LVPECL, DC and AC Characteristics

= Low, for all Vdds

Maximum average current drawn from OUT+ or OUT-

See

Figure 1(a)

See

Figure 1(a)

See

Figure 1(b)

20% to 80%, see

Figure 1(a)

f = 212.5 MHz - For other frequencies, T_oe = 100ns + 3 period

f = 100 MHz, VDD = 3.3V or 2.5V

f = 156.25 MHz, VDD = 3.3V or 2.5V

f = 212.5 MHz, VDD = 3.3V or 2.5V

f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,

all Vdds

Rev 1.08

August 17, 2019

www.sitime.com

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