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5962R9662902VXC

Description
4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16, CERAMIC, FP-16
Categorylogic    logic   
File Size138KB,24 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
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5962R9662902VXC Overview

4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16, CERAMIC, FP-16

5962R9662902VXC Parametric

Parameter NameAttribute value
Objectid2082028747
Parts packaging codeDFP
package instructionDFP, FL16,.3
Contacts16
Reach Compliance Codeunknown
series4000/14000/40000
JESD-30 codeR-CDFP-F16
JESD-609 codee4
Load capacitance (CL)50 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Maximum Frequency@Nom-Sup2590000 Hz
MaximumI(ol)0.00064 A
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Encapsulate equivalent codeFL16,.3
Package shapeRECTANGULAR
Package formFLATPACK
power supply5/15 V
Prop。Delay @ Nom-Sup405 ns
propagation delay (tpd)405 ns
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class V
Maximum supply voltage (Vsup)18 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
total dose100k Rad(Si) V
Trigger typePOSITIVE EDGE
minfmax2.59 MHz
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