ADSP-2115KP-100 datasheet, PDF

ADSP-2115KP-100: DescriptionIC 24-BIT, 25 MHz, OTHER DSP, PQCC68, PLASTIC, LCC-68, Digital Signal Processor; CategoryThe embedded processor and controller Microcontrollers and processors; File Size444KB，64 Pages; ManufacturerADI; Websitehttps://www.analog.com

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ADSP-2115KP-100 Overview

IC 24-BIT, 25 MHz, OTHER DSP, PQCC68, PLASTIC, LCC-68, Digital Signal Processor

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Parts packaging code	LCC
package instruction	QCCJ, LDCC68,1.0SQ
Contacts	68
Reach Compliance Code	not_compliant
ECCN code	3A991.A.3
Is Samacsys	N
Address bus width	14
barrel shifter	YES
bit size	16
boundary scan	NO
maximum clock frequency	25 MHz
External data bus width	24
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-PQCC-J68
JESD-609 code	e0
length	24.18 mm
low power mode	YES
Number of DMA channels
Number of external interrupt devices	1
Number of serial I/Os	2
Number of terminals	68
Number of timers	1
On-chip data RAM width	16
On-chip program ROM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	512
Maximum seat height	4.45 mm
Maximum slew rate	38 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	24.18 mm
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches	1

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