Latch-up Current .................................................... > 200 mA
Operating Range
Range
Industrial
Automotive
Ambient Temperature (T
A
)
−40°C
to +85°C
−40°C
to +125°C
V
CC
[7]
2.2V to 3.6V
2.2V to 3.6V
DC Electrical Characteristics
(Over the Operating Range)
CY62126DV30-55
Parameter
V
OH
Description
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Voltage
2.2V < V
CC
< 2.7V
2.7V < V
CC
< 3.6V
2.2V < V
CC
< 2.7V
2.7V < V
CC
< 3.6V
2.2V < V
CC
< 2.7V
2.7V < V
CC
< 3.6V
Test Conditions
I
OH
=
−0.1
mA
I
OH
=
−1.0
mA
I
OL
= 0.1 mA
I
OL
= 2.1 mA
1.8
2.2
−0.3
−0.3
Ind’l
Auto
GND < V
O
< V
CC
, Output Disabled
Ind’l
Auto
f = f
Max
= 1/t
RC
f = 1 MHz
V
CC
= 3.6V,
I
OUT
= 0 mA, CMOS
level
L
Ind’l
Auto
LL
−1
−4
−1
−4
5
0.85
1.5
1.5
1.5
Min.
2.0
2.4
0.4
0.4
V
CC
+ 0.3
V
CC
+ 0.3
0.6
0.8
+1
+4
+1
+4
10
1.5
5
15
4
µA
µA
mA
µA
µA
V
V
V
Typ.
[5]
Max.
Unit
V
V
OL
V
IH
V
IL
Input LOW Voltage 2.2V < V
CC
< 2.7V
2.7V < V
CC
< 3.6V
I
IX
Input Leakage
Current
Output Leakage
Current
V
CC
Operating
Supply Current
Automatic CE
Power-down
Current—
CMOS Inputs
GND < V
I
< V
CC
I
OZ
I
CC
I
SB1
CE > V
CC
−
0.2V,
V
IN
> V
CC
−
0.2V,
V
IN
< 0.2V,
f = f
Max
(Address and Data Only),
f = 0 (OE, WE, BHE and BLE)
CE > V
CC
−
0.2V,
V
IN
> V
CC
−
0.2V or
V
IN
< 0.2V, f = 0, V
CC
= 3.6V
I
SB2
Automatic CE
Power-down
Current—
CMOS Inputs
L
Ind’l
Auto
1.5
1.5
1.5
5
15
4
LL
Notes:
5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25°C.
6. V
IL(min.)
=
−2.0V
for pulse durations less than 20 ns., V
IH(max.)
= V
CC
+ 0.75V for pulse durations less than 20 ns.
7. Full device operation requires linear ramp of V
CC
from 0V to V
CC(min)
& V
CC
must be stable at V
CC(min)
for 500
µs.
Document #: 38-05230 Rev. *H
Page 3 of 12
[+] Feedback
CY62126DV30 MoBL
®
Capacitance
[8]
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25°C, f = 1 MHz, V
CC
= V
CC(typ)
Max.
8
8
Unit
pF
pF
Thermal Resistance
[8]
Parameter
Θ
JA
Θ
JC
Description
Test Conditions
TSOP
55
12
VFBGA
76
11
Unit
°C/W
°C/W
Thermal Resistance (Junction to Ambient) Still Air, soldered on a 3 x 4.5 inch,
2-layer printed circuit board
Thermal Resistance (Junction to Case)
AC Test Loads and Waveforms
R1
V
CC
OUTPUT
50 pF
INCLUDING
JIG AND
SCOPE
Equivalent to:
OUTPUT
THEVENIN EQUIVALENT
R
TH
V
TH
R2
V
CC
Typ
10%
GND
Rise TIme: 1 V/ns
ALL INPUT PULSES
90%
90%
10%
Fall Time: 1 V/ns
Parameters
R1
R2
R
TH
V
TH
2.5V
16600
15400
8000
1.2
3.0V
1103
1554
645
1.75
Unit
Ohms
Ohms
Ohms
Volts
Data Retention Characteristics
Parameter
V
DR
I
CCDR
Description
V
CC
for Data Retention
Data Retention Current
V
CC
=1.5V, CE > V
CC
−
0.2V,
V
IN
> V
CC
−
0.2V or V
IN
< 0.2V
L
L
LL
t
CDR[8]
t
R[9]
Chip Deselect to Data
Retention Time
Operation Recovery Time
Ind’l
Auto
Ind’l
0
100
Conditions
Min.
1.5
4
10
3
ns
µs
Typ
[2]
Max.
Unit
V
µA
Data Retention Waveform
DATA RETENTION MODE
V
CC
V
CC(min)
t
CDR
V
DR
> 1.5 V
V
CC(min)
t
R
CE
Notes:
8. Tested initially and after any design or proces changes that may affect these parameters.
9. Full device operation requires linear V
CC
ramp from V
DR
to V
CC(min.)
>100
µs.
Document #: 38-05230 Rev. *H
Page 4 of 12
[+] Feedback
CY62126DV30 MoBL
®
Switching Characteristics
(Over the Operating Range)
[10]
CY62126DV30-55
Parameter
Read Cycle
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
PU
t
PD
t
DBE
t
LZBE
t
HZBE
Write Cycle
[13]
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
BW
t
SD
t
HD
t
HZWE
t
LZWE
Write Cycle Time
CE LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
BLE/BHE LOW to Write End
Data Set-up to Write End
Data Hold from Write End
WE LOW to High Z
[11, 12]
WE HIGH to Low Z
[11]
10
55
40
40
0
0
40
40
25
0
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
[11]
OE HIGH to High Z
[11, 12]
CE LOW to Low Z
[11]
CE HIGH to High Z
[11, 12]
CE LOW to Power-up
CE HIGH to Power-down
BLE/BHE LOW to Data Valid
BLE/BHE LOW to Low Z
[11]
BLE/BHE HIGH to High-Z
[11, 12]
5
20
0
55
25
10
20
5
20
10
55
25
55
55
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Description
Min.
Max.
Unit
Notes:
10. Test conditions assume signal transition time of 1V/ns or less, timing reference levels of V
CC(typ.)
/2, input pulse levels of 0 to V
CC(typ.)
, and output loading of
the specified I
OL
.
11. At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
, t
HZBE
is less than t
LZBE
, t
HZOE
is less than t
LZOE
.
12. t
HZOE
, t
HZCE
, t
HZBE
, and t
HZWE
transitions are measured when the outputs enter a high-impedance state.
13. The internal Write time of the memory is defined by the overlap of WE, CE = V
IL
, BHE and/or BLE = V
IL
. All signals must be ACTIVE to initiate a write and any
of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates
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