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DSC557-053232KI1T

Description
PROC SPECIFIC CLOCK GENERATOR
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size300KB,7 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Parametric View All

DSC557-053232KI1T Overview

PROC SPECIFIC CLOCK GENERATOR

DSC557-053232KI1T Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerMicrochip
package instructionHVQCCN,
Reach Compliance Codecompliant
ECCN codeEAR99
Is SamacsysN
Other featuresELIMINATED THE EXT QUARTZ CRYSTAL AND USED MEMS CLOCK GENERATORS AS EXT CLOCK
JESD-30 codeR-XQCC-N20
length5 mm
Humidity sensitivity level1
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency460 MHz
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Package shapeRECTANGULAR
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Maximum seat height0.9 mm
Maximum supply voltage3.6 V
Minimum supply voltage2.25 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
width3.2 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches1
DSC557-05
Crystal-less™ Four Output PCIe Clock Generator
General Description
The DSC557-05 is a Crystal-less™, four
output PCI express clock generator meeting
Gen1, Gen2, and Gen3 specifications. The
clock generator uses proven silicon MEMS
technology to provide excellent jitter and
stability over a wide range of supply
voltages and temperatures. By eliminating
the external quartz crystal, MEMS clock
generators significantly enhance reliability
and accelerate product development, while
meeting stringent clock performance criteria
for a variety of communications, storage,
and networking applications.
DSC557-05 has an Output Enable / Disable
feature allowing it to disable all outputs
when OE1 and OE2 are low. Each output
enable
pin
controls
two
banks
of
synchronous PCIe clocks.
See the OE
function diagram for more detail.
The
device is available in a 20 pin QFN.
Additional output formats are in any
combination of LVPECL, LVDS, and HCSL.
Advanced Datasheet
Features
Meets PCIe Gen1, Gen2 & Gen3 specs
Available Output Formats:
o
o
HCSL, LVPECL, or LVDS
Mixed Outputs: LVPECL/HCSL/LVDS
Ext. Industrial: -40° to 105° C
Industrial: -40° to 85° C
Ext. commercial: -20° to 70° C
Wide Temperature Range
o
o
o
Supply Range of 2.25 to 3.6 V
Low Power Consumption
o
30% lower than competing devices
Qualified to MIL-STD-883
20 QFN
Excellent Shock & Vibration Immunity
o
Available Footprints:
o
Lead Free & RoHS Compliant
Short Lead Time: 2 Weeks
Block Diagram
Applications
Communications/Networking
o
o
o
o
o
Ethernet
1G, 10GBASE-T/KR/LR/SR, and FcoE
Routers and Switches
Gateways, VoIP, Wireless AP’s
Passive Optical Networks
*
Clk0+/-, Clk1+/-, Clk2 +/- and Clk3 +/- are
100 MHz as per PCIe standards. For other
frequencies, please contact the factory.
Storage
o
SAN, NAS, SSD, JBOD
Embedded Applications
o
Industrial, Medical, and Avionics
o
Security Systems and Office
Automation
o
Digital Signage, POS and others
______________________________________________________________________________________________________________________________________________
DSC557-05
Page 1
Advanced v1.5
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o
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