P4C116-35DC datasheet, PDF - EEWORLD Datasheet

P4C116-35DC: DescriptionStandard SRAM, 2KX8, 35ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24; Categorystorage storage; File Size1MB，15 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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P4C116-35DC Overview

Standard SRAM, 2KX8, 35ns, CMOS, CDIP24, 0.300 INCH, CERAMIC, DIP-24

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Pyramid Semiconductor Corporation
Parts packaging code	DIP
package instruction	DIP, DIP24,.3
Contacts	24
Reach Compliance Code	compliant
ECCN code	EAR99
Is Samacsys	N
Maximum access time	35 ns
I/O type	COMMON
JESD-30 code	R-CDIP-T24
JESD-609 code	e0
length	31.75 mm
memory density	16384 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	24
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX8
Output characteristics	3-STATE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum standby current	0.01 A
Minimum standby current	4.5 V
Maximum slew rate	0.14 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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