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SL23EP04SC-2

Description
clock buffer 10-220mhz 4 outputs zdb 3.3-2.5V
Categorylogic    logic   
File Size953KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
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SL23EP04SC-2 Overview

clock buffer 10-220mhz 4 outputs zdb 3.3-2.5V

SL23EP04SC-2 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codecompli
Other featuresALSO OPERATES WITH 3.3V SUPPLY
series23EP
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G8
length4.889 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Number of functions1
Number of inverted outputs
Number of terminals8
Actual output times4
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.25 ns
Maximum seat height1.727 mm
Maximum supply voltage (Vsup)2.75 V
Minimum supply voltage (Vsup)2.25 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.8989 mm
SL23EP04NZ
Low Jitter and Skew DC to 220 MHz Clock Buffer
Key Features
DC to 220 MHz operating frequency range
Low output clock skew: 60ps-typ
Low part-to-part output skew: 80 ps-typ
3.3V to 2.5V operation supply voltage range
Low power dissipation:
- 10 mA-typ at 66MHz at VDD=3.3V
- 9 mA-typ at 66MHz at VDD=2.5V
One input to four output fanout buffer drivers
Output Enable (OE) control function
Available in 8-pin TSSOP package
Available in Commercial and Industrial grades
Available in Lead (Pb) free package
General Purpose PCI/PCI-X Clock Buffer
Printers, MFPs and Digital Copiers
PCs and Work Stations
Routers, Switchers and Servers
Datacom and Telecom
High-Speed Digital Embeded Systems
Description
The SL23EP04NZ products operate from DC to 220MHz.
The only difference between SL23EP04-1 and
SL23EP04NZ-1Z is the OE logic implementation. Refer to
the Available OE Logic Configuration Table. 1
Benefits
Applications
Block Diagram
om
m
en
OE
de
Logic
Control
d
fo
rN
Up to four (4) distribution of input clock
Low propagation delay
Low output-to-output skew
Low output jitter
Low power dissipation
ec
CLKIN
CLK3
ot
R
N
VDD
GND
Rev 2.1, May 2, 2008
ew
CLK1
CLK2
CLK4
2400 West Cesar Chavez, Austin, TX 78701
1+(512) 416-8500
1+(512) 416-9669
D
es
Page 1 of 11
The SL23EP04NZ is a low skew, jitter and power fanout
buffer designed to produce up to four (4) clock outputs
from one (1) reference input clock, for high speed clock
distribution, including PCI/PCI-X applications.
www.silabs.com
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