KLI-8023
Linear CCD Image Sensor
Description
The KLI−8023 Image Sensor is a multispectral, linear solid state
image sensor for color scanning applications where ultra-high
resolution is required.
The imager consists of three parallel linear photodiode arrays, each
with 8,000 active photosites for the output of red, green, and blue
(R, G, B) signals. This device offers high sensitivity, high data rates,
low noise and negligible lag. Individual electronic exposure control
for each color allows the KLI−8023 sensor to be used under a variety
of illumination conditions. The imager can be operated in an Extended
Dynamic Range mode for the most demanding applications.
Table 1. GENERAL SPECIFICATIONS
Parameter
Architecture
Pixel Count
Pixel Size
Pixel Pitch
Inter-Array Spacing
Imager Size
Saturation Signal
Dynamic Range
(2 MHz Data Rate)
Responsivity
R, G, B (−RAA)
R, G, B (−DAA)
Mono (−AAA, −SAA, −MAA)
Output Sensitivity
Dark Current
Dark Current Doubling Rate
Charge Transfer Efficiency
Photoresponse Non-Uniformity
Lag (First Field)
Maximum Data Rate
Package
Cover Glass
Typical Value
3 Channel, RGB Trilinear CCD
8002
×
3
9
mm
(H)
×
9
mm
(V)
9
mm
108
mm
(12 Lines Effective)
72.0 mm (H)
×
0.225 mm (V)
185 ke
−
(Normal DR Mode)
400 ke
−
(Extended DR Mode)
84 dB (Normal DR Mode)
90 dB (Extended DR Mode)
32, 20, 20 V/mJ/cm
2
29, 19, 18 V/mJ/cm
2
33 V/mJ/cm
2
14.4
mV/e
−
0.002 pA/Pixel
8°C
0.999998/Transfer
3% Peak-Peak
0.025%
6 MHz/Channel
CERDIP (Sidebrazed, CuW)
AR Coated, 2 Sides
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Figure 1. KLI−8023 Linear CCD
Image Sensor
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
12 Line Spacing between Color Channels
Single Shift Register per Channel
High Off-Band Spectral Rejection
Dark Reference Pixels Provided
Anti-Reflective Glass
Wide Dynamic Range, Low Noise
Dual Dynamic Range Mode Operation
No Image Lag
Electronic Exposure Control
High Charge Transfer Efficiency
Two-Phase Register Clocking
74 ACT Logic Compatible Clocks
6 MHz Maximum Data Rate
Applications
NOTE: Parameters above are specified at T = 25°C (junction temperature) and
1 MHz clock rates unless otherwise noted.
•
Digitization
•
Medical Imaging
•
Photography
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2015
1
November, 2015 − Rev. 2
Publication Order Number:
KLI−8023/D
KLI−8023
ORDERING INFORMATION
Table 2. ORDERING INFORMATION − KLI−8023 IMAGE SENSOR
Part Number
KLI−8023−AAA−ED−AA
KLI−8023−AAA−ED−AE
KLI−8023−RAA−ED−AA
KLI−8023−RAA−ED−AE
KLI−8023−SAA−ED−AA
Description
Monochrome, No Microlens, CERDIP Package (Leadframe),
Clear Cover Glass with AR Coating (Both Sides), Standard Grade
Monochrome, No Microlens, CERDIP Package (Leadframe),
Clear Cover Glass with AR Coating (Both Sides), Engineering Sample
Gen2 Color (RGB), No Microlens, CERDIP Package (Leadframe),
Clear Cover Glass with AR Coating (Both Sides), Standard Grade
Gen2 Color (RGB), No Microlens, CERDIP Package (Leadframe),
Clear Cover Glass with AR Coating (Both Sides), Engineering Sample
Monochrome with RB Surround – Gen2, No Microlens, CERDIP Package
(Leadframe), Clear Cover Glass with AR Coating (Both Sides), Standard
Grade
Monochrome with RB Surround – Gen2, No Microlens, CERDIP Package
(Leadframe), Clear Cover Glass with AR Coating (Both Sides), Engineering
Sample
Monochrome with RB Surround – Gen1, No Microlens, CERDIP Package
(Leadframe), Clear Cover Glass with AR Coating (Both Sides), Standard
Grade
Monochrome with RB Surround – Gen1, No Microlens, CERDIP Package
(Leadframe), Clear Cover Glass with AR Coating (Both Sides), Engineering
Sample
Gen1 Color (RGB), No Microlens, CERDIP Package (Leadframe),
Clear Cover Glass with AR Coating (Both Sides), Standard Grade
Gen1 Color (RGB), No Microlens, CERDIP Package (Leadframe),
Clear Cover Glass with AR Coating (Both Sides), Engineering Sample
KLI−8023 (Lot Code)
(Serial Number)
KLI−8023 (Lot Code)
(Serial Number)
KLI−8023 (Lot Code)
(Serial Number)
KLI−8023 (Lot Code)
(Serial Number)
Marking Code
KLI−8023 (Lot Code)
(Serial Number)
KLI−8023−SAA−ED−AE
KLI−8023−MAA−ED−AA*
KLI−8023−MAA−ED−AE*
KLI−8023−DAA−ED−AA*
KLI−8023−DAA−ED−AE*
*Not recommended for new designs.
Table 3. ORDERING INFORMATION − EVALUATION SUPPORT
Part Number
KLI−8023−12−5−A−EVK
Evaluation Board (Complete Kit)
Description
See the ON Semiconductor
Device Nomenclature
document (TND310/D) for a full description of the naming convention
used for image sensors. For reference documentation, including information on evaluation kits, please visit our web site at
www.onsemi.com.
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2
KLI−8023
DEVICE DESCRIPTION
LS
LOGn
Photodiode Array
IG
ID
TG1
TG2
6 Blank
CCD Cells
14 Test
8002 Active Pixels
16 Dark
f
R
6 Blank
CCD Cells
OG
SUB
f2B
VSSn
VIDn
FD
RD
VDD
Figure 2. Single Channel Schematic
Dark Reference Pixels
Dark reference pixels are groups of photosensitive pixels
covered by a metal light shield. These pixels are used as
a black level reference for the image sensor output. Since the
incident light is blocked from entering these pixels,
the signal contained in these pixels is due only to dark
current. It is assumed that each photosensitive pixel (active
and dark reference) will have approximately the same dark
signal; thus, subtracting the average dark reference signal
from each active pixel signal will remove the background
dark signal level. Dark reference pixels are typically located
at one or both ends of the arrays, as shown earlier in this
document for a linear image sensor in the single channel
schematic.
Dynamic Range
Dynamic Range (DR) is the ratio of the maximum output
signal, or saturation level, of an image sensor to the dark
noise level of the imager. The dark noise level, or noise floor
of an imager is typically expressed as the root mean square
(rms) variation in dark signal voltage. The dark signal
includes components from dark current within the photosite
and CCD regions, reset transistor and output amplifier noise,
and input clocking noise. An input referred noise signal in
the charge domain can be calculated by dividing the dark
noise voltage by the imager charge-to-voltage conversion
factor. The dynamic range is typically expressed in units of
decibels as: DR = 20
⋅
LOG (N
SAT
/ Noise).
High Dynamic Range Mode (DR)
Two modes of device operation can be realized,
the ‘normal mode’ and ‘high dynamic range mode’. In
‘the normal mode’ of operation, clocking of the output
structure reset gate (PHIR, pin 12) remains similar to all
other clocks at 6.25 Vp-p. The usable saturation exposure in
this mode is approximately 180,000 electrons, yielding
a saturation voltage of 2.5 volts. In the ‘high dynamic range’
mode, the reset gate clocking is increased to 12 Vp-p and the
reset drain bias (RD, pin 29) is increased to the upper
amplifier supply voltage (VDD, pin 26). The usable
saturation exposure in this mode increases to 400,000 e
−
with a saturation voltage in excess of 5 volts.
Image Acquisition
During the integration period, an image is obtained by
gathering electrons generated by photons incident upon the
photodiodes. The charge collected in the photodiode array
is a linear function of the local exposure. The charge is stored
in the photodiode itself and is isolated from the CCD shift
registers during the integration period by the transfer gates
TG1 and TG2, which are held at barrier potentials. At the
end of the integration period, the CCD register clocking is
stopped with the
f1
and
f2
gates being held in a ‘high’ and
‘low’ state respectively. Next, the TG gates are turned ‘on’
causing the charge to drain from the photodiode into the TG1
storage region. As TG1 is turned back ‘off’ charge is
transferred through TG2 and into the
f1
storage region.
The TG2 gate is then turned ‘off’, isolating the shift registers
from the accumulation region once again. Complementary
clocking of the
f1
and
f2
phases now resumes for readout
of the current line of data while the next line of data is
integrated.
Charge Transport
Readout of the signal charge is accomplished by
two-phase, complementary clocking of the
f1
and
f2
gates.
The register architecture has been designed for high speed
clocking with minimal transport and output signal
degradation, while still maintaining low (6.25 Vp-p min)
clock swings for reduced power dissipation, lower clock
noise and simpler driver design. The data in all registers is
clocked simultaneously toward the output structures.
The signal is then transferred to the output structures in
a parallel format at the falling edge of the
f2
clocks.
Re-settable floating diffusions are used for the
charge-to-voltage conversion while source followers
provide buffering to external connections. The potential
change on the floating diffusion is dependent on the amount
of signal charge and is given by
DV
FD
=
DQ
/ C
FD
, where
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KLI−8023
DV
FD
is the change in potential of the floating diffusion,
DQ
is the amount of charge deposited on the floating diffusion,
and C
FD
is the floating diffusion capacitance. Prior to each
pixel output, the floating diffusion is returned to the RD level
by the reset clock,
fR.
Charge Transfer Efficiency
Charge Transfer Efficiency (CTE) is a measure of how
efficiently electronic charge can be transported by a Charge
Coupled Device (CCD). This parameter is especially
important in linear imager technology due to the fact that
CCDs are often required to transport charge packets over
long distances at very high speeds. The result of poor CTE
is to reduce the overall MTF of the line image in a nonlinear
fashion: the portion of the line image at the far end of the
CCD will be degraded more than the image at the output end
of the CCD, since it will undergo more CCD transfers. There
are many possible mechanisms that can negatively influence
the CTE. Amongst these mechanisms are included
excessive CCD clocking frequency, insufficient drive
potential on the CCD clocking gates, and incorrect voltage
bias on the output gate (OG signal). The effect of these
mechanisms is that some charge is “left behind” during
a CCD transfer clocking cycle. Depending on the limiting
mechanism, the lost charge could be added to the immediate
trailing cell or to a cell further back in time; thus, causing
a horizontal smearing of the line image.
The charge lost from a CCD cell, after being transferred
out of the CCD, is measured with respect to the original
charge level and is termed the charge transfer inefficiency
(CTI). CTI is defined as:
CTI
+
Total Charge Lost
Initial Charge
@
1
Number of Transfers
value occurs at the slowest clocking frequency.
Additionally, dark current doubles for approximately every
8°C increase in temperature.
Fixed Pattern Noise
If the output of an image sensor under no illumination is
viewed at high gain, a distinct non-uniform pattern or fixed
pattern noise can be seen. This fixed pattern can be removed
from the video by subtracting the dark value of each pixel
from the pixel values read out in all subsequent frames. Dark
fixed pattern noise is usually caused by variations in dark
current across an imager, but can also be caused by input
clocking signals abruptly starting or stopping, or by having
the CCD clocks not being close compliments of each other.
Mismatched CCD clocks can result in high instantaneous
substrate currents, which when combined with the fact that
the silicon substrate has some non-zero resistance, can result
in the substrate potential bouncing. The pattern noise can
also be seen when the imager is under uniform illumination.
An imager that exhibits a fixed pattern noise under uniform
illumination and shows no pattern in the dark is said to have
light pattern noise or photosensitivity pattern noise. In
addition to the reasons mentioned above, light pattern noise
can be caused by the imager entering saturation,
the nonuniform clipping effect of the anti-blooming circuit,
and by non-uniform photosensitive pixel areas often caused
by debris covering portions of some pixels.
Exposure Control
Exposure control is implemented by selectively clocking
the LOG gates during portions of the scanning line time. By
applying a large enough positive bias to the LOG gate, the
channel potential is increased to a level beyond the ‘pinning
level’ of the photodiode. (The ‘pinning’ level is the
maximum channel potential that the photodiode can achieve
and is fixed by the doping levels of the structure.) With TG1
in an ‘off’ state and LOG strongly biased, all of the
photocurrent will be drawn off to the LS drain. Referring to
the timing diagrams in Figure 12 and Figure 13, one notes
that the exposure can be controlled by pulsing the LOG gate
to a ‘high’ level while TG1 is turning ‘off’ and then
returning the LOG gate to a ‘low’ bias level sometime during
the line scan. The effective exposure (t
EXP
) is the net time
between the falling edge of the LOG gate and the falling
edge of the TG1 gate (end of the line). Separate LOG
connections for each channel are provided, enabling on-chip
light source and image spectral color balancing. As
a cautionary note, the switching transients of the LOG gates
during line readout may inject an artifact at the sensor
output. Rising edge artifacts can be avoided by switching
LOG during the photodiode-to-CCD transfer period,
preferably during the TG1 falling edge. Depending on
clocking speeds, the falling edge of the LOG should be
synchronous with the
f1/f2
shift register readout clocks.
For very fast applications, the falling edge of the LOG gate
may be limited by on-chip RC delays across the array. In this
case artifacts may extend across one or more pixels.
The efficiency of the CCD transfer (CTE) is then defined
as simply:
CTE
+
1
*
CTI
Note that the total transfer efficiency for the entire line
(TTE) is equal to (CTE)N, where N is the total number of
transfers which is equal to the number of phases per cell,
times the number of cells (n).
TTE
+
CTE
@
2
@
8022
Dark Signal Evaluation
The dark signal evaluation measures the thermally
generated electronic current (i.e. background noise signal)
at a specific operating temperature. Dark current is
measured will all incident radiation removed (i.e. imager is
in the dark). The current measured by the picoammeter is the
dark current of the photodiode array plus the dark current of
the CCD array. Multiplying the dark current by the total
integration time yields the quantity of dark charge. And
dividing the dark current by the number of photodiodes
yields the dark current per photodiode (I
Dark
). Dark voltage
increases linearly with integration time, the worst-case
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KLI−8023
Correlated double sampling (CDS) processing of the output
waveform can remove the first order magnitude of such
artifacts. In high dynamic range applications, it may be
advisable to limit the LOG fall times to minimize the current
transients in the device substrate and limit the magnitude of
the artifact to an acceptable level.
Lag
Lag, or decay lag is a measure of the amount of
photogenerated
charge
left
behind
during
a photodiode-to-CCD transfer cycle. Ideally, no charge is
left behind during such transfers and lag is equal to zero; that
is, 100% of the collected photogenerated charge is
transferred to the adjacent CCD. The use of “pinned”
photodiode technology enables the linear imagers to achieve
near perfect lag performance. Improper Transfer Gate (TG)
clocking levels can introduce a lag type response. Thus, care
must be taken to ensure that the clocking levels are not
limiting the lag performance.
Imager Responsivity
Responsivity is a measure of the imager output when
exposed to a given optical energy density. It is measured on
monochrome and color (if applicable) versions of an imager
over the entire wavelength range of operation. Imagers
having multiple photodiode arrays with differing color
filters and/or photodiode dimensions have responsivity
measured on each array. Responsivity is reported in units of:
V
mJ
cm
2
and may be different from one photosite to the next.
An image sensor with excessive exposure control defects
would be rejected during quality assurance testing. The loss
of charge during the transportation of charge packets from
the photosite to the CCD, which is termed lag, tends to affect
the linearity only at very small signal levels. “Pinned”
photodiodes, or buried photodiodes, have extremely small
lag (< 0.5%), and can be considered to be lag free. The CCD
charge transfer inefficiency (CTI) will reduce the amplitude
of the charge packet as it is transported towards the output
amplifier, with the greatest effect realized at very small
signal levels. Modern CCD’s have CTE in excess of
0.999999 per CCD transfer; thus, the overall effect on
linearity is generally not a concern. If biased properly, the
output amplifier will yield a non-linearity of typically less
than 2%. Non linearity at signal levels beyond the saturation
level is expected and can often vary significantly from pixel
to pixel.
Linearity Evaluation
Ideally, the output video amplitude should vary linearly
with incident light intensity over the entire input range of
irradiance. There are many possible phenomena that can
cause non-linearity in the response curve; inadequate CTE
and improper biasing or clocking to name a few.
Electronic exposure control could be used to vary the
photodiode integration time; however, since electronic
exposure control can introduce non-linearity, it is not
recommended as a method of limiting the input signal.
The output signal versus relative irradiance is graphed and
a least squares, linear regression fit to the data is performed.
The best fit data curve should pass through zero volts and
remain linear (R
2
> 0.99) up to the V
SAT
level.
Modulation Transfer Function (MTF)
MTF is the magnitude of the spatial frequency response of
a solid-state imager. The three main components of imager
MTF are termed the aperture MTF, diffusion MTF, and
charge transfer efficiency MTF. The aperture MTF results
from the discrete sampling nature of solid-state imagers,
with smaller pixel pitches yielding a better high frequency
MTF response. The diffusion of photogenerated charge
degrades the imager response and is responsible for the
second component. The third component is due to inefficient
charge transfer in the shift register. The maximum spatial
frequency an imager can detect without aliasing occurring
is defined as the Nyquist frequency and is equal to the
inverse of two times the pixel pitch. MTF is typically
reported at the Nyquist frequency, 1/2 Nyquist, and 1/4
Nyquist. The aperture MTF limits the maximum response at
Nyquist to 0.637. (Note that the maximum MTF response is
1.0). The diffusion component will further degrade this
value, especially at longer optical wavelengths.
Linearity
The non-linearity of an image sensor is typically defined
as the percent deviation from the ideal linear response,
which is defined by the line passing through V
SAT
and
V
DARK
. The percent linearity is then 100 minus the
non-linearity. The output linearity of a solid-state image
sensor is determined from the linearity of the photon
collection process, the electron exposure structure
non-linearities (if any exists), the efficiency of charge
transportation from the photosite to the output amplifier, and
the output amplifier linearity. The absorption of photons
within the silicon substrate can be considered an ideal linear
function of incident illumination level when averaged over
a given period of time. The existence of an electronic
exposure control circuit adjacent to the photosensitive sites
can introduce a non-linearity into the overall response by
allowing small quantities of charge to remain isolated in
unwanted potential wells. Whether or not any potential wells
exist depends on the design and manufacturing of the
particular image sensor. The existence of such potential
wells in the exposure circuitry, also called exposure control
defects, will degrade the linearity only at small signal levels
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