OZ964
Change Summary
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered
recipients.
CHANGES
No.
1
2
3
4
5
6
7
Applicable Section
Title
Ordering Information
General Description
Functional Block Diagram
Description
Reference Application
Circuit
Package information
Throughout data sheet
Description
Change the title to read ‘Phase-Shift PWM Controller’
Add OZ964GN, OZ964IG, OZ964IGN, OZ964D &
OZ964DN
st
Add 1 paragraph ‘OZ964 is a high…LCD.’
Add 1
st
paragraph 1
st
sentence ‘Specific DC/CD…’
Add DC/DC Reference Application Circuit
Correct 20 Pin SOIC 300mil drawing
Miscellaneous corrections
Page(s)
1
1
1
5
10
12
---
REVISION HISTORY
Revision No.
0.95
0.96
Description of change
Initial Release
1. Ordering information: add OZ964SN & OZ964ISN. 2. Pin
Description: modified pin description of CTIMR, DIM. 3. Electrical
Characteristics: revise
a)
‘Nominal Voltage’ Typ limit,
b)
‘Normal
Operating Frequency’ Typ limit,
c)
‘Ramp Peak’ Typ limit,
d)
‘Operating Frequency’ Typ limit,
e)
‘Negative-Going Threshold
Voltage’ Max limit,
f)
‘SST Current’ Typ limit,
g)
‘CTIMR Current 1’
Typ limit,
h)
‘Protection Release Threshold’ Typ limit,
i)
‘PDR_A/
PDR_C’ Typ`limit,
j)
‘Enable’ Min limit,
k)
‘NDR_B/ NDR_D’ Typ limit,
l)
‘BBM Time Between PDR and NDR’ Typ limit,
m)
‘Minimum
Overlap’ Typ limit. 4. Simplified Functional Block Diagram. 5. Modified
formula in No. 4 Ignition & No. 5 Normal Operation in Functional
Information. 6. Revise Application Circuit. 7. Miscellaneous
corrections.
1. Electrical Characteristics:
a)
Fill in Min & Max limits of all
parameters
b)
Correct ‘SST Protection Release Threshold’ Typ limit.
2. Application Circuit: Correct
a)
C10 to 6.8n,
b)
T1 to 28:2200. 3.
Miscellaneous corrections.
1. Footer: Add patent number 6,259,615 2. Application circuit:
a.)
Delete R3, R7, R6 & R11.
b)
Change R9 value from 45.3k to 47K
Release Date
1/13/2004
3/19/2004
1.0
4/5/2004
1.1
7/29/2004
09/03/04
Copyright
2004 by O
2
Micro
OZ964-DS-1.2
All Rights Reserved
Page 0
U.S. Patent No. 6,259,615
CONFIDENTIAL
OZ964
Phase-Shift PWM Controller
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered
recipients.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
Controller for high-voltage DC/DC and
DC/AC converters
High efficiency, zero-voltage switching
Supports wide input voltage range
Constant operating frequency
Built-in PWM dimming control with wide
dimming range
Soft start function
Built-in intelligence for ignition and normal
operation of CCFLs
Built-in open-lamp protection and over-
voltage protection
Shutdown delay for input voltage brownout
condition
Built-in under-voltage lockout protection
Toggle pin to reset the IC after shutdown
Low stand-by power
OZ964 operates in a zero-voltage switching
mode
that
minimizes
electromagnetic
interference (EMI). In addition, OZ964 achieves a
high power-conversion efficiency resulting in a
lower operating temperature and higher system
reliability.
OZ964 supports a wide input voltage range and
provides a constant, user-defined, operating
frequency, ensuring that the CCFLs operate at a
fixed frequency. This eliminates interference
among CCFLs and the LCD panel. Interference
causes electromagnetic compatibility (EMC)
problems and may create visual effects
(waterfall) on LCD panels. The controller
provides a phase-shift square wave output that is
able to drive a full bridge power train.
OZ964 utilizes a pulse width modulation (PWM)
dimming method to achieve a wide dimming
range. The IC performs the CCFL dimming
function with an analog or low frequency PWM
control. The PWM frequency is user-defined.
To avoid over-shoot and in-rush current to the
CCFLs during ignition, a soft start function is
provided for reliable CCFL operation.
The controller provides open-lamp protection and
over-voltage protection, while providing an
appropriate response for either open-lamp
ignition or removal of a CCFL during normal
operation. Intelligent open-lamp protection and
over voltage protection provides design flexibility
with various transformer characteristics. Open-
lamp protection time is user-defined.
In addition, OZ964 provides a shutdown delay
function that will keep the inverter module in
normal operation for a short period of time if the
input voltage suddenly drops and subsequently
resumes to a normal level. The shutdown delay
time is user-defined.
OZ964 provides under-voltage lockout protection
and will disable the IC if VDDA falls below a
threshold. OZ964 will resume normal operation
when VDDA exceeds the threshold.
To reset the IC, toggle the enable (ENA) pin.
OZ964 operates with a standby current of
approximately 200uA.
ORDERING INFORMATION
Part
Number
OZ964S
OZ964SN
OZ964
I
S
OZ964ISN
OZ964G
OZ964GN
OZ964IG
OZ964IGN
OZ964D
OZ964DN
Temp Range
0° C to 70° C
0° C to 70° C
-40° C to +85°C
-40° C to +85°C
0° C to 70° C
0° C to 70° C
-40° C to +85°C
-40° C to +85°C
0° C to 70° C
0° C to 70° C
Package
20-pin SSOP
20-pin SSOP,
Leadfree
20-pin SSOP
20-pin SSOP,
Leadfree
20-pin SOIC
20-pin SOIC,
Leadfree
20-pin SOIC
20-pin SOIC,
Leadfree
20-pin PDIP
20-pin PDIP,
Leadfree
GENERAL DESCRIPTION
OZ964 is a high efficiency, Pulse Width
Modulation (PWM) controller designed for both
DC/DC and DC/AC high-voltage applications.
The average current mode control is suitable for
DC/DC converters where both voltage and
current feedback are required, as well as for Cold
Cathode Fluorescent Lamp (CCFL)_ backlight
applications for small and large Liquid Crystal
Displays (LCD).
09/03/04
Copyright
2004 by O
2
Micro
OZ964-DS-1.2
All Rights Reserved
Page 1
U.S. Patent No. 6,259,615
CONFIDENTIAL
OZ964
PIN DESCRIPTION
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered
recipients.
Names
CTIMR
OVP
ENA
SST
VDDA
GNDA
REF
RT1
FB
CMP
NDR_D
PDR_C
LPWM
DIM
LCT
PGND
RT
CT
PDR_A
NDR_B
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Description
Timing capacitor to provide striking time and timing resistor to provide
shutdown delay time
Voltage feedback
Enable input
Timing capacitor to provide Soft-Start Time
Supply voltage
Signal ground
Reference voltage output
Timing resistor to provide striking frequency
Current sense feedback
Voltage control loop compensation
N-MOSFET gate drive output
P-MOSFET gate drive output
Low-frequency PWM signal for dimming control
DC voltage input for LPWM duty cycle
Timing capacitor to provide LPWM frequency
Power MOSFET driver ground
Timing resistor to provide striking and operating frequency
Timing capacitor to provide striking and operating frequency
P-MOSFET gate drive output
N-MOSFET gate drive output
ABSOLUTE MAXIMUM RATINGS
(1)
VDDA
GNDA, PGND
Signal inputs
Operating Temp.
7.0V
+/- 0.3V
-0.3V to (VDDA +0.3)V
OZ964
0 C to 70
o
C
o
OZ964I
-40 C to +85
o
C
o
Operating junction temp.
Storage temp.
125
o
C
-55
o
C to 150
o
C
RECOMMENDED OPERATING RANGE
VDDA
f
OP
- operating frequency
Resistor connected to RT (R
RT
)
Capacitor connected to CT (C
CT
)
f
LF
- LPWM frequency
Thermal Impedance (
θ
J-A
)
-
20-pin SSOP
-
20-pin SOIC
4.6V to 5.5V
40 kHz to 150kHz
(2)
20 kΩ to 150 kΩ
100pF to 470pF
100Hz to 500Hz
o
80 C/W
o
105 C/W
Note
(1)
: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be
guaranteed. The device should not be operated at these limits. The “Functional Specifications” table will
define the conditions for actual device operation. Exposure to absolute maximum rated conditions for
extended periods may affect device reliability.
Note
(2)
: The frequency of PDR_A, NDR_B, PDR_C, and NDR_D outputs pulses,
f
OP
, is half of
f
osc value,
f
OP
=(f
osc/2).
CONFIDENTIAL
OZ964-DS-1.2
Page 2
OZ964
ELECTRICAL CHARACTERISTICS
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered
recipients.
Parameter
Symbol
Test Conditions
VDDA=5V; Tamb=25 C;
o
Limits
Min
Typ
Max
Unit
Reference Voltage
Nominal voltage
Vref
I
load
= 30µA
Temp coefficient
o
(Tamb=25 C)
Line regulation
Load regulation
Operating Frequency
Normal Operating Frequency
K
L
K
V
VDDA=4.6V to 5.5V
I
load
= 5
µA
to 80
µA
C
CT
=220pF ;
R
RT
=47kΩ
(1)
(1)
3.22
-
-
-
3.35
125
2
2
3.48
-
-
-
V
ppm/ C
mV/V
mV
o
f
op
61.5
-
2.35
1.00
63.0
125
2.50
1.05
220
470
2.06
0.31
-
65.5
-
2.65
1.12
225
-
2.18
0.33
100
kHz
ppm/ C
V
V
Hz
ppm/ C
V
V
%
o
o
Temp coefficient
o
(Tamb=25 C)
Ramp peak
Ramp valley
Low Frequency Oscillator
Operating frequency
CT V
peak
CT V
valley
f
LF
C
LCT
=6.8nF(2); V
DIM
=1.2V
Temp coefficient
o
(Tamb=25 C)
209
-
1.96
0.27
0
Ramp peak
Ramp valley
Duty Cycle Range
Error Amplifier
Reference voltage at non-
inverting input pin (internal)
Under-Voltage Lockout
Positive-Going Threshold Voltage
Negative-Going Threshold Voltage
Supply
Stand-by Current
Supply Current
LCT V
peak
LCT V
valley
LPWM
V
ADJ
V
SST
=0V
V
SST
=2V
V
SST
=4V
0.49
0.79
1.19
4.3
-
0.50
0.80
1.24
-
-
200
0.55
0.81
1.29
-
3.2
300
V
V
V
V
V
I
OFF
I
ON
ENA=low
DIM=1.2V; LPWM=50kΩ
Ca=Cb=Cc=Cd=0.5nF
C
CT
=220pF ,
R
RT
=47kΩ
(1)
(1)
(3)
-
µ
A
-
(2)
3.0
4.2
mA
;C
LCT
=6.8nF
Soft Start
SST current
Temp coefficient
o
(Tamb=25 C)
SST Protection Release Threshold
CTIMR
CTIMR current 1
Temp coefficient
o
(Tamb=25 C)
CTIMR current 2
Protection release threshold
2.0
-
20
2.9
2.5
395
30
3.1
2.9
-
40
3.3
4.5
-
VDDA
-1.25
5.5
420
VDDA
-1.0
6.2
-
VDDA
-0.93
µ
A
ppm/ C
V
o
µ
A
ppm/ C
o
µ
A
V
CONFIDENTIAL
OZ964-DS-1.2
Page 3
OZ964
ELECTRICAL CHARACTERISTICS (CONTINUED)
Controlled Recipient #101461 printed on 10/25/2004. Updates will be provided to registered
recipients.
Parameter
Output Driver Rds(on)
PDR_A / PDR_C
NDR_B / NDR_D
Enable Thresholds
Enable
Disable
Over-Voltage Protection
Threshold Voltage
Open-Lamp Protection Threshold
Open-Lamp Threshold
Break-Before-Make (BBM)
BBM Time Between PDR and NDR
Symbol
Test Conditions
VDDA=5V; Tamb=25 C;
Sourcing=75mA
Sinking=75mA
o
Limits
Min
12
13
2.3
-
Typ
25
25
-
-
2.00
Max
35
36
-
1.0
2.20
Unit
Ω
Ω
V
V
V
OVP
CMP> open-lamp threshold
causes shutdown
1.95
2.54
2.70
2.82
V
150
Temp coefficient
o
(Tamb=25 C)
-
200
495
220
-
ns
ppm/ C
o
Maximum / Minimum Duty Cycle
Maximum Overlap
Minimum Overlap
Vsst = 3.75V ;
Vcmp = 3.24V
Vsst = 0.8V ;
Vcmp = 3.5V
Note
C
CT
: capacitor from ”CT” (Pin 18) to ground
R
RT
: resistor from “RT” (Pin 17) to ground
Note
C
LCT
: capacitor from “LCT” (Pin 15) to ground
Note
Ca: capacitor from PDR_A (Pin 19) to VDDA
Cb: capacitor from NDR_B (Pin 20) to ground
Cc: capacitor from PDR_C (Pin 12) to VDDA
Cd: capacitor from NDR_D (Pin 11) to ground
(3)
(2)
(1)
91
-
95
2.5
-
3.9
%
%
CONFIDENTIAL
OZ964-DS-1.2
Page 4
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