STM32F439xx
ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, crypto,
USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, camera&LCD-TFT
Data brief
Features
■
FBGA
■
■
■
■
●
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■
■
■
■
Core: ARM 32-bit Cortex™-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 180 MHz,
MPU, 225 DMIPS/1.25 DMIPS/MHz
(Dhrystone 2.1), and DSP instructions
Memories
– Up to 2 MB of Flash memory organized into
two banks allowing read-while-write
– Up to 256+4 KB of SRAM including 64-KB
of CCM (core coupled memory) data RAM
– Flexible external memory controller with up
to 32-bit data bus: SRAM,PSRAM,SDRAM,
Compact Flash/NOR/NAND memories
LCD parallel interface, 8080/6800 modes
LCD-TFT controller up to VGA resolution with
dedicated Chrom-ART Accelerator™ for
enhanced graphic content creation (DMA2D)
Clock, reset and supply management
– 1.8 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1%
accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
Low power
– Sleep, Stop and Standby modes
– V
BAT
supply for RTC, 20×32 bit backup
registers + optional 4 KB backup SRAM
3×12-bit, 2.4 MSPS ADC: up to 24 channels
and 7.2 MSPS in triple interleaved mode
2×12-bit D/A converters
General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
Up to 17 timers: up to twelve 16-bit and two 32-
bit timers up to 180 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input
Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex-M4 Embedded Trace Macrocell™
LQFP100 (14 × 14 mm)
LQFP144 (20 × 20 mm) UFBGA176 (10 × 10 mm)
LQFP176 (24 × 24 mm) TFBGA216 (13 x 13 mm) WLCSP144(1)
LQFP208 (28 x 28 mm)
1. WLCSP144 will be available soon.
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Up to 168 I/O ports with interrupt capability
– Up to 164 fast I/Os up to 84 MHz
– Up to 166 5 V-tolerant I/Os
Up to 21 communication interfaces
– Up to 3 × I
2
C interfaces (SMBus/PMBus)
– Up to 4 USARTs/4 UARTs (11.25 Mbit/s,
ISO7816 interface, LIN, IrDA, modem
control)
– Up to 6 SPIs (42 Mbits/s), 2 with muxed
full-duplex I
2
S for audio class accuracy via
internal audio PLL or external clock
– 1 x SAI (serial audio interface)
– 2 × CAN (2.0B Active) and SDIO interface
Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
8- to 14-bit parallel camera interface up to
54 MBs/s
Cryptographic acceleration: hardware
acceleration for AES 128, 192, 256, Triple
DES, HASH (MD5, SHA-1, SHA-2), and HMAC
True random number generator
CRC calculation unit
96-bit unique ID
RTC: subsecond accuracy, hardware calendar
Device summary
Part number
Table 1.
Reference
STM32F439VI, STM32F439VG, STM32F439ZG,
STM32F439ZI, STM32F439IG, STM32F439II,
STM32F439xx
STM32F439BG, STM32F439BI, STM32F439NI,
STM32F439NG
February 2013
Doc ID 023211 Rev 1
1/92
www.st.com
1
For further information contact your local STMicroelectronics sales office.
Contents
STM32F439xx
Contents
1
2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
2.2
Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
2.2.7
2.2.8
2.2.9
2.2.10
2.2.11
2.2.12
2.2.13
2.2.14
2.2.15
2.2.16
2.2.17
2.2.18
2.2.19
2.2.20
2.2.21
2.2.22
2.2.23
2.2.24
2.2.25
2.2.26
2.2.27
2.2.28
2.2.29
ARM
®
Cortex™-M4F core with embedded Flash and SRAM . . . . . . . . 13
Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . 13
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 14
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Flexible memory controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
LCD-TFT controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Chrom-ART Accelerator™ (DMA2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 17
External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 17
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 24
Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . 24
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
V
BAT
operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Universal synchronous/asynchronous receiver transmitters (USART) . 29
Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Inter-integrated sound (I
2
S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Serial Audio interface (SAI1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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2.2.30
2.2.31
2.2.32
2.2.33
2.2.34
2.2.35
2.2.36
2.2.37
2.2.38
2.2.39
2.2.40
2.2.41
2.2.42
2.2.43
2.2.44
Contents
Audio and LCD PLL(PLLSAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Secure digital input/output interface (SDIO) . . . . . . . . . . . . . . . . . . . . . 31
Ethernet MAC interface with dedicated DMA and IEEE 1588 support . 32
Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . 32
Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . 33
Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Cryptographic acceleration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . 34
Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 35
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3
4
5
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.1
5.2
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
6
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Appendix A Application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
A.1
A.2
A.3
USB OTG full speed (FS) interface solutions . . . . . . . . . . . . . . . . . . . . . . 86
USB OTG high speed (HS) interface solutions . . . . . . . . . . . . . . . . . . . . . 88
Ethernet interface solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Doc ID 023211 Rev 1
3/92
List of tables
STM32F439xx
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
STM32F439xx features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Voltage regulator configuration mode versus device operating mode . . . . . . . . . . . . . . . . 21
Regulator ON/OFF and internal reset ON/OFF availability. . . . . . . . . . . . . . . . . . . . . . . . . 24
Voltage regulator modes in stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
USART feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
STM32F439xx pin and ball definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
FMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
STM32F439xx alternate function mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
STM32F439xx register boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
LQPF100 – 14 x 14 mm 100-pin low-profile quad flat package mechanical data. . . . . . . . 74
LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package mechanical data . . . . . . . . 76
LQFP176, 24 x 24 mm, 176-pin low-profile quad flat package mechanical data . . . . . . . . 78
LQFP208, 28 x 28 mm, 208-pin low-profile quad flat package mechanical data . . . . . . . . 80
UFBGA176+25 - ultra thin fine pitch ball grid array 10 × 10 × 0.6 mm
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
TFBGA216 - ultra thin fine pitch ball grid array 13 × 13 × 0.8mm
package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4/92
Doc ID 023211 Rev 1
STM32F439xx
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Compatible board design STM32F10xx/STM32F2xx/STM32F4xx
for LQFP100 package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Compatible board design between STM32F10xx/STM32F2xx/STM32F4xx
for LQFP144 package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Compatible board design between STM32F2xx and STM32F4xx
for LQFP176 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STM32F439xx block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
STM32F439xx Multi-AHB matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Power supply supervisor interconnection with internal reset OFF . . . . . . . . . . . . . . . . . . . 19
PDR_ON control with internal reset OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Startup in regulator OFF: slow V
DD
slope
- power-down reset risen after V
CAP_1
/V
CAP_2
stabilization . . . . . . . . . . . . . . . . . . . . . . . . 23
Startup in regulator OFF mode: fast V
DD
slope
- power-down reset risen before V
CAP_1
/V
CAP_2
stabilization . . . . . . . . . . . . . . . . . . . . . . 23
STM32F43x LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
STM32F43x LQFP144 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
STM32F43x LQFP176 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
STM32F43x LQFP208 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
STM32F43x UFBGA176 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
STM32F43x TFBGA216 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
LQFP100, 14 x 14 mm 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . 73
LQPF100 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . 76
LQFP144 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
LQFP176 24 x 24 mm, 176-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . 78
LQFP176 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
LQFP208, 28 x 28 mm, 208-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . 80
LQFP208 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
UFBGA176+25 - ultra thin fine pitch ball grid array 10 × 10 × 0.6 mm,
package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
TFBGA216 - ultra thin fine pitch ball grid array 13 × 13 × 0.8mm,
package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
USB controller configured as peripheral-only and used
in Full speed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
USB controller configured as host-only and used in full speed mode. . . . . . . . . . . . . . . . . 86
USB controller configured in dual mode and used in full speed mode . . . . . . . . . . . . . . . . 87
USB controller configured as peripheral, host, or dual-mode
and used in high speed mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
MII mode using a 25 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
RMII with a 50 MHz oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
RMII with a 25 MHz crystal and PHY with PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Doc ID 023211 Rev 1
5/92
京公网安备 11010802033920号
EEWORLD
