T322E686K010AT7293 datasheet, PDF

T322E686K010AT7293: DescriptionTantalum Capacitor, Polarized, Tantalum, 10V, 10% +Tol, 10% -Tol, 68uF,; CategoryPassive components capacitor; File Size9MB，84 Pages; ManufacturerKEMET; Websitehttp://www.kemet.com; Environmental Compliance

Download Datasheet Parametric View All

T322E686K010AT7293 Overview

Tantalum Capacitor, Polarized, Tantalum, 10V, 10% +Tol, 10% -Tol, 68uF,

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	709906106
package instruction	,
Reach Compliance Code	compliant
ECCN code	EAR99
capacitance	68 µF
Capacitor type	TANTALUM CAPACITOR
diameter	7.11 mm
dielectric materials	TANTALUM (DRY/SOLID)
ESR	1300 mΩ
JESD-609 code	e3
length	13.46 mm
negative tolerance	10%
Number of terminals	2
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package form	Axial
method of packing	Ammo Pack
polarity	POLARIZED
positive tolerance	10%
Rated (DC) voltage (URdc)	10 V
series	T32X
Terminal surface	Matte Tin (Sn)

Optocoupler replacement: Does anyone know which optocoupler manufacturer in China can replace Skyworks' OLI100?...; Anjiang Domestic Chip Exchange

Working principle of photoelectric encoder: Photoelectric encoder is a sensor that converts the mechanical geometric displacement on the output shaft into pulses or digital quantities through photoelectric conversion. This is the most widely us...; 卓联微科技 Motor Drive Control（Motor Control）

Questions about TMS320f28027F SVPWM: SVPWM is generally generated using 7-segment or 5-segment methods, and the location of the synthetic magnetic field needs to be considered. Recently, I was studying TI's C2000-launchpadTMS320f28027F p...; fish001 Microcontroller MCU

Policy Analysis IPTV: [i=s]This post was last edited by jameswangsynnex on 2015-3-3 19:57[/i]Policies will no longer be a hindrance to the development of the IPTV industry 2006-7-18Zheng Qibao, executive vice president of ...; hkn Mobile and portable

FPGA controls TMS320C6678 power-on reset program: module DSP_RST(input clk_25m,　input RESETSTAT, //DSP reset status 0 means reset status 1 means working statusinput LOCKED, //Is the clock module normal? output ref LRESETNMIENz = 1'b0,//局部复位管脚 output ...; 灞波儿奔 DSP and ARM Processors

FPGA design clean code 3-Signal naming and definition should be clear: [align=left]In design, we constantly name and define directories, source codes, files, functions, variables, parameters, classes, and packages. When a job needs to be done many times, it is enough to ...; guyu_1 FPGA/CPLD

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components