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V827564U24SBJY-D3

Description
DDR DRAM Module, 64MX72, 0.65ns, CMOS, PDMA184
Categorystorage    storage   
File Size414KB,16 Pages
ManufacturerProMOS Technologies Inc
Environmental Compliance  
Download Datasheet Parametric View All

V827564U24SBJY-D3 Overview

DDR DRAM Module, 64MX72, 0.65ns, CMOS, PDMA184

V827564U24SBJY-D3 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Objectid1125506585
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time0.65 ns
Maximum clock frequency (fCLK)200 MHz
I/O typeCOMMON
JESD-30 codeR-PDMA-N184
JESD-609 codee4
memory density4831838208 bit
Memory IC TypeDDR DRAM MODULE
memory width72
Number of terminals184
word count67108864 words
character code64000000
Maximum operating temperature70 °C
Minimum operating temperature
organize64MX72
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeDIMM
Encapsulate equivalent codeDIMM184
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2.5 V
Certification statusNot Qualified
refresh cycle8192
Maximum standby current0.09 A
Maximum slew rate3.24 mA
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceGOLD
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
V827564U24SB
64M x 72 HIGH PERFORMANCE
LOW PROFILE (1U) REGISTERED ECC
DDR SDRAM MODULE
Features
184 Pin Registered 67,108,864 x 72 bit
Organization DDR SDRAM Modules
Utilizes High Performance 64M x 8 DDR
SDRAM in TSOPII-66 and FBGA Packages
Single +2.5V (± 0.2V) Power Supply
Single +2.6V (± 0.1V) Power Supply for DDR400
Programmable CAS Latency, Burst Length, and
Wrap Sequence (Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
All Inputs, Outputs are SSTL-2 Compatible
8192 Refresh Cycles every 64 ms
Serial Presence Detect (SPD)
1.2 or 1.125 inches Low Profile Registered
DIMM
Component
Used
t
CK
t
AC
Description
The V827564U24SB memory module is
organized 67,108,864 x 72 bits in a 184 pin memory
module. The 64M x 72 memory module uses 9
ProMOS 64M x 8 DDR SDRAM. The x72 low profile
modules are ideal for use in high performance
computer systems where increased memory
density, fast access times and small form factors
are required.
Module Speed
-6
-7
-75
-8
D3
Units
C0
166
(PC333)
B0
133
(PC266B)
Units
MHz
ns
ns
CLK
CLK
Clock Frequency (max.)
200
Clock Frequency
166
143
133
125
MHz
(PC333) (PC266A)(PC266B) (PC200)(PC400B)
(max.)
Clock
=3
t
CK
6
7
Clock Access Cycle Time CAS Latency7.5
Time CAS Latency Time CAS Latency = 2.5
Clock Cycle
= 2.5
tRCD parameter
t
RCD
t
RP
tRP parameter
8
5
ns
6
3
3
-
6
3
3
-
7.5
3
3
Module Speed
A1
B0
B1
PC1600 (100MHz @ CL2)
PC2100B (133MHz @ CL2.5)
PC2100A (133MHz @ CL2)
V827564U24SB Rev. 1.0 November 2005
1

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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