SL23E P0 5
L
O W
J
I T T E R A N D
S
K E W
10
B
U F F E R
( ZDB)
Features
TO
22 0 MH
Z
Z
E R O
D
E L A Y
10 to 220 MHz operating
frequency range
Low output clock jitter:
ps-typ cycle-to-cycle jitter
20 ps-typ period jitter
50
Low power dissipation:
16
mA-max at 66 MHz and
VDD = 3.3 V
14 mA-max at 66 MHz and
VDD = 2.5 V
Low output-to-output skew:
30 ps-typ
Low product-to-product skew:
60 ps-typ
Wide 2.5 V to 3.3 V power supply
range
One input drives five outputs
organized as 4+1
SpreadThru™ PLL that allows
use of SSCG
Standard and High-Drive options
Available in 8 pin SOIC and
TSSOP packages
Available in Commercial and
Industrial grades
Ordering Information:
See page 14.
Pin Assignments
Applications
Printers and MFPs
Digital Copiers
PCs and Work Stations
Routers, Switchers and Servers
Digital Embedded Systems
SL23EP05
Benefits
Up to five distribution of input
clock
Standard and High-Drive levels
to control impedance level,
frequency range and EMI
Low power dissipation, jitter and
skew
Low cost
Description
The SL23EP05 is a low skew, low jitter, and low power Zero Delay Buffer
(ZDB) designed to produce up to five clock outputs from one reference input
clock for high speed clock distribution applications. The product has an on-
chip PLL which locks to the input clock at CLKIN and receives its feedback
internally from the CLKOUT pin.
The SL23EP05 is available with two drive strength versions called –1 and
–1H. The –1 is the standard-drive version and –1H is the high-drive version.
The SL23EP05 high-drive version operates up to 220 MHz and 180 MHz at
3.3 V and 2.5 V power supplies, respectively. The standard drive version –1
operates up to 200 MHz and 167 MHz at 3.3 V and 2.5 V, respectively.
The SL23EP05 enter into Power Down (PD) mode if the input at CLKIN is
less then 2.0 MHz or there is no rising edge. In this state all five outputs are
tri-stated and the PLL is turned off leading to less than 10
μA
of power
supply current draw.
Patents pending
Rev. 2.2 5/15
Copyright © 2015 by Silicon Laboratories
SL23EP05
SL23EP05
Functional Block Diagram
2
Rev. 2.2
S L23E P 05
T
A B L E
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3. Input and Output Frequency Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4. SpreadThru™ Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
5. High and Low-Drive Product Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
6. Skew and Zero Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
7. Power Supply Range (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
8. External Components and Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
8.1. Comments and Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
8.2. Switching Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
9. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
10. Package Outline and Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
10.1. 8-Lead SOIC (150 mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
11. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Rev. 2.2
3
SL23EP05
1. Electrical Specifications
Table 1. DC Electrical Specifications (V
DD
= 3.3 V)
Unless otherwise stated for both C and I Grades.
Parameter
Supply Voltage
Input LOW Voltage
Input HIGH Voltage
Input Leakage Current
Input HIGH Current
Output LOW Voltage
Symbol
VDD
VIL
VIH
IIL
IIH
VOL
Test Condition
Min
3.0
—
2.0
Max
3.6
0.8
V
DD
+0.3
±10
100
0.4
0.4
—
—
10
25
16
Unit
V
V
V
μA
μA
V
V
V
V
μA
μA
mA
0 < VIN < 0.8 V
VIN = V
DD
IOL = 8 mA (Standard Drive)
IOL = 12 mA (High Drive)
—
—
—
—
2.4
2.4
—
—
—
Output HIGH Voltage
VOH
IOH = –8 mA (Standard Drive)
IOH = –12 mA (High Drive)
Power Down Supply Current
IDDPD
CLKIN = 0 MHz (Commercial)
CLKIN = 0 MHz (Industrial)
Power Supply Current
IDD
All Outputs CL = 0, 66-MHz CLKIN
Table 2. DC Electrical Specifications (V
DD
= 2.5 V)
Unless otherwise stated for both C and I Grades.
Parameter
Supply Voltage
Input LOW Voltage
Input HIGH Voltage
Input Leakage Current
Input HIGH Current
Output LOW Voltage
Symbol
VDD
VIL
VIH
IIL
IIH
VOL
Test Condition
Min
2.3
—
1.7
Max
2.7
0.7
V
DD
+ 0.3
+/-10
100
0.5
0.5
—
—
10
25
14
Unit
V
V
V
μA
μA
V
V
V
V
μA
μA
mA
0<VIN < 0.8 V
VIN = V
DD
IOL = 8 mA (Standard drive)
IOL = 12 mA (High drive)
—
—
—
—
V
DD
– 0.6
V
DD
– 0.6
—
—
—
Output HIGH Voltage
VOH
IOH = –8 mA (Standard drive)
IOH = –12 mA (High drive)
Power Down Supply Current
IDDPD
CLKIN = 0 MHz (Commercial)
CLKIN = 0 MHz (Industrial)
Power Supply Current
IDD
All Outputs CL = 0, 66 MHz CLKIN
4
Rev. 2.2
S L23E P 05
Table 3. AC Electrical Specifications (V
DD
= 3.3 V and 2.5 V)
Parameter
Maximum Frequency
(Input=Output)
1
Symbol
FMAX
Test Condition
3.3 V High Drive
3.3 V Standard Drive
2.5 V High Drive
2.5 V Standard Drive
Input Duty Cycle
Output Duty Cycle
2
INDC
<135 MHz, V
DD
= 3.3 V
<135 MHz, V
DD
= 2.5 V
OUTDC
<135 MHz, V
DD
= 3.3 V
<135 MHz, V
DD
= 2.5 V
Rise, Fall Time (3.3V)
Measured at:
0.8 to 2.0 V
2
tr/f3.3
High drive, CL = 15 pF, >135 MHz
Std drive, CL = 15 pF, <170 MHz
High drive, CL = 30 pF, <100 MHz
Std drive, CL = 30 pF, <100 MHz
Rise, Fall Time (2.5)
2
Measured at: 0.6 to 1.8 V
tr/f2.5
High drive, CL = 15 pF, >135 MHz
Std drive, CL = 15 pF, <135 MHz
High drive, CL = 30 pF, <100 MHz
Output-to-Output Skew
2
t
1
All outputs CL = 0, 3.3 V supply,
2.5 V power supply, standard drive
All outputs CL = 0, 2.5 V power supply,
high drive
Delay Time, CLKIN Rising
Edge to CLKOUT Rising
Edge
2
Part-to-Part Skew
2
t2
PLL enabled @ 3.3 V
PLL enabled @2.5 V
t3
Measured at V
DD
/2. Any output to any
output, 3.3 V supply
Measured at V
DD
/2. Any output to any
output, 2.5 V supply
Min
10
10
10
10
25
40
45
40
—
—
—
—
—
—
—
—
—
–100
–200
–150
–300
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
30
40
—
—
—
—
Max
220
200
180
167
75
60
55
60
0.5
1.5
1.5
2.5
1.5
2.5
2.5
90
100
100
200
150
300
Unit
MHz
MHz
MHz
MHz
%
%
%
%
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
ps
ps
ps
Notes:
1.
For the given maximum loading conditions. See CL in Operating Conditions Table.
2.
Parameter is guaranteed by design and characterization. Not 100% tested in production.
Rev. 2.2
5
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