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PO74G126A_14

Description
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
File Size1MB,6 Pages
ManufacturerPotato Semiconductor Corporation
Websitehttp://www.potatosemi.com/
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PO74G126A_14 Overview

QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

PO74G126A
www.potatosemi.com
QUADRUPLE BUS BUFFER GATE
WITH 3-STATE OUTPUTS
74 Series Noise Cancellation GHz Logic
FEATURES:
. Patented technology
. Operating frequency up to 1.125GHz with 2pf load
. Operating frequency up to 700MHz with 5pf load
. Operating frequency up to 400MHz with 15pf load
. VCC Operates from 1.65V to 3.6V
. Propagation delay < 1.5ns max with 15pf load
. Low input capacitance: 4pf typical
. Available in 14pin 150mil wide SOIC package
DESCRIPTION:
Potato Semiconductor’s PO74G126A is designed for
world top performance using submicron CMOS
technology to achieve 1.125GHz TTL /CMOS output
frequency with less than 1.5ns propagation delay.
This quadruple bus buffer gate is designed for 1.65-V
to 3.6-V V
CC
operation.
The
PO74G126A
featuresindependent
linedriverswith3-stateoutputs. Eachoutput isdisabled-
whenthe associatedoutput-enable(OE)input islow.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
Pin Configuration
1OE
1A
1Y
2OE
2A
2Y
GND
Logic Block Diagram
V
CC
4OE
4A
4Y
3OE
3A
3Y
3OE
1OE
1A
1
2
3
1Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
2OE
2A
4
5
6
2Y
10
9
8
3Y
Pin Description
OE
H
H
L
INPUTS
A
H
X
L
OUTPUT
Y
H
Z
L
3A
4OE
4A
13
12
11
4Y
Potato Semiconductor Corporation
1
01/01/10

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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