EPA189-24 datasheet, PDF - EEWORLD Datasheet

EPA189-24: Description14 Pin DIL Triple TTL Compatible Active Delay Lines; Categorylogic logic; File Size13KB，1 Pages; ManufacturerPCA Electronics Inc.; Websitehttp://www.pca.com/

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EPA189-24 Overview

14 Pin DIL Triple TTL Compatible Active Delay Lines

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	PCA Electronics Inc.
Parts packaging code	DIP
package instruction	DIP-14
Contacts	14
Reach Compliance Code	compli
Other features	MAX FAN OUT OF 10 TTL LOAD PER OUTPUT; MAX RISE TIME CAPTURED
series	TTL
Input frequency maximum value (fmax)	41.6667 MHz
JESD-30 code	R-XDIP-T8
JESD-609 code	e0
Logic integrated circuit type	ACTIVE DELAY LINE
Humidity sensitivity level	3
Number of functions	1
Number of taps/steps	3
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	TRUE
Package body material	UNSPECIFIED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	115 mA
programmable delay line	NO
Prop。Delay @ Nom-Su	24 ns
Certification status	Not Qualified
Maximum seat height	6.985 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	24 ns
width	7.62 mm

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