AN3070
Application note
Managing the Driver Enable signal for RS-485 and IO-Link
communications with the STM32™’s USART
Introduction
RS-485 and IO-Link are half-duplex communication protocols that offer easy ways of
implementing the physical layer in industrial networks.
The STM32F10x, which comes with up to 5 UART interfaces and features fast DMA transfer
and low interrupt latency, meets the RS-485 and IO-Link timing specifications.
This application note aims at providing timing measurements of the DE signal (Driver
Enable) switching by using two different methods for managing this signal in RS-485 and
IO-Link master transmission.
The application note is organized into three parts:
●
●
●
it first explains why the timing of the DE signal is critical
it then describes the two methods used to manage the DE signal
and, finally, it gives different measurements of the DE signal switching time
January 2010
Doc ID 16312 Rev 1
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www.st.com
Contents
AN3070
Contents
1
2
DE signal timing constraint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Description of the methods used to manage the DE signal . . . . . . . . . 6
2.1
2.2
Method using the DMA interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Method using the USART interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Measuring the DE signal switching time using the
two methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
Measuring the DE signal switching time . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1.1
3.1.2
Measuring the DE signal switching time using the DMA interrupt
method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Measuring the DE signal switching time using the USART interrupt
method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4
5
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Timing measurements of DE switching at 72 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Timing measurements of DE switching at 24 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Timing measurements of DE switching at 72 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Timing measurements of DE switching at 24 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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List of figures
AN3070
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
DE timing constraint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
DMA interrupt method to control the DE signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
USART interrupt method to control the DE signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Zoom in DE signal switching period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
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DE signal timing constraint
1
DE signal timing constraint
For serial half-duplex communication protocols like RS-485 & IO-Link, the master needs to
generate a direction signal to control the transceiver (PHY). This signal informs the PHY if it
must act in send or receive mode.
The timing of this control is critical, especially when switching from the send to the receive
mode, as the application has to make sure that the device is in reception mode before data
are sent by the other entity.
The master has to free the Tx/Rx line in no more than a bit time, otherwise there is a
collision with the slave response. So the DE signal has to switch from high to low level within
the bit time that follows the last bit of the last byte sent by the master.
Figure 1.
DE timing constraint
t
BIT
C/Q line
Master request
Slave
response
t
DE (Driver Enable)
ai17356
The master should be able to guarantee the timing of the DE signal (imposed by the RS-485
& IO-Link specifications). The DE signal is managed by a GPIO.
Note that in this application note, the DE signal is emulated by GPIO port C pin 6 (PC6),
however any GPIO could be used.
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