HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
Small Package 8-Bit OTP MCU
Technical Document
·
Application Note
-
HA0075E MCU Reset and Oscillator Circuits Application Note
Features
CPU Features
·
Operating voltage:
·
LIRC oscillator function for watchdog timer
·
All instructions executed in one or two instruction
f
SYS
= 4MHz: 2.2V~5.5V
f
SYS
= 8MHz: 3.0V~5.5V
f
SYS
= 12MHz: 4.5V~5.5V
·
Up to 0.33ms instruction cycle with 12MHz system
cycles
·
Table read instructions
·
63 powerful instructions
·
6-level subroutine nesting
·
Bit manipulation instruction
·
Low voltage reset function
·
10-pin MSOP, 16-pin NSOP package types
clock at V
DD
= 5V
·
Sleep mode and wake-up functions to reduce
power consumption
·
Oscillator types:
External high frequency Crystal
External RC
Internal RC
External low frequency crystal
Watchdog Timer internal RC oscillator
·
Three operational modes: Normal, Slow, Sleep
·
Fully integrated internal 4MHz, 8MHz and 12MHz
Peripheral Features
·
Up to 10 bidirectional I/O lines
·
4 channel 12-bit ADC
·
1 channel 8-bit PWM
·
External interrupt input shared with an I/O line
·
Two 8-bit programmable Timer/Event
oscillator requires no external components
·
OTP Program Memory: 1K´15 ~ 2K´15
·
RAM Data Memory: 96´8
·
Watchdog Timer function
Counter with overflow interrupt and prescaler
·
Time-Base function
·
Programmable Frequency Divider - PFD
General Description
The Small Package MCUs are a series of 8-bit high per-
formance, RISC architecture microcontrollers specifi-
cally designed for a wide range of applications. The
usual Holtek microcontroller features of low power con-
sumption, I/O flexibility, timer functions, oscillator op-
tions, power down and wake-up functions, watchdog
timer and low voltage reset, combine to provide devices
with a huge range of functional options while still main-
taining a high level of cost effectiveness. The fully inte-
grated system oscillator HIRC, which requires no
external components and which has three frequency
selections, opens up a huge range of new application
possibilities for these devices, some of which may in-
clude industrial control, consumer products, household
appliances subsystem controllers, etc.
Rev.1.10
1
February 12, 2010
HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
Selection Table
Part No.
HT48R01B
HT48R02B
HT46R01B
HT46R02B
HT48R01N
HT48R02N
HT46R01N
HT46R02N
Program
Data
Memory Memory
1K´15
2K´15
1K´15
2K´15
1K´15
2K´15
1K´15
2K´15
96´8
96´8
96´8
96´8
96´8
96´8
96´8
96´8
I/O
8
8
8
8
10
10
10
10
8-bit Time
Timer Base
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
Interrupt
A/D
Ext.
1
1
1
1
1
1
1
1
Int.
3
3
4
4
3
3
4
4
¾
¾
12-bit´4
12-bit´4
¾
¾
12-bit´4
12-bit´4
¾
¾
8-bit´1
8-bit´1
¾
¾
8-bit´1
8-bit´1
6
6
6
6
6
6
6
6
10MSOP
10MSOP
10MSOP
10MSOP
16NSOP
16NSOP
16NSOP
16NSOP
PWM
Stack
Package
Block Diagram
The following block diagram illustrates the main functional blocks.
L o w
V o lta g e
R e s e t
P W M
D r iv e r
O T P
P ro g ra m
M e m o ry
R A M
D a ta
M e m o ry
P F D
D r iv e r
I/O
P o rts
W a tc h d o g
T im e r
R e s e t
C ir c u it
8 - b it
R IS C
M C U
C o re
In te rru p t
C o n tr o lle r
E x te rn a l
R C /X T
O s c illa to r
A /D
C o n v e rte r
T im e r s
T im e
B a s e
In te rn a l
O s c illa to r
Rev.1.10
2
February 12, 2010
HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
Pin Assignment
P A 3 /IN T
1
2
3
4
5
6
7
8
P A 2 /T C 0
P A 1 /P F D
P A 0
V S S
1 0
9
P A 4 /T C 1
P A 5 /O S C 2
P A 6 /O S C 1
P A 7 /R E S
V D D
P A 3 /IN T /A N 3
P A 2 /T C 0 /A N 2
P A 1 /P F D /A N 1
P A 0 /A N 0
V S S
5
4
6
3
7
2
8
1
1 0
9
P A 4 /T C 1 /P W M
P A 5 /O S C 2
P A 6 /O S C 1
P A 7 /R E S
V D D
H T 4 8 R 0 1 B /H T 4 8 R 0 2 B
1 0 M S O P -A
H T 4 6 R 0 1 B /H T 4 6 R 0 2 B
1 0 M S O P -A
P A 3 /IN T
1
2
3
4
5
6
7
8
P A 2 /T C 0
P A 1 /P F D
P A 0
P B 0
V S S
N C
N C
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
P A 4 /T C 1
P A 5 /O S C 2
P A 6 /O S C 1
P A 7 /R E S
P B 1
V D D
N C
N C
P A 3 /IN T /A N 3
1
2
3
4
5
6
7
8
P A 2 /T C 0 /A N 2
P A 1 /P F D /A N 1
P A 0 /A N 0
P B 0
V S S
N C
N C
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
P A 4 /T C 1 /P W M
P A 5 /O S C 2
P A 6 /O S C 1
P A 7 /R E S
P B 1
V D D
N C
N C
H T 4 8 R 0 1 N /H T 4 8 R 0 2 N
1 6 N S O P -A
H T 4 6 R 0 1 N /H T 4 6 R 0 2 N
1 6 N S O P -A
Pin Description
HT46R01B/HT46R02B
Pin Name
Function
PA0
PA0/AN0
AN0
PA1
PA1/PFD/AN1
PFD
AN1
PA2
PA2/TC0/AN2
TC0
AN2
PA3
PA3/INT/AN3
INT
AN3
PA4
PA4/TC1/PWM
TC1
PWM
PA5
PA5/OSC2
OSC2
OPT
PAPU
PAWK
ADCR
PAPU
PAWK
CTRL0
ADCR
PAPU
PAWK
¾
ADCR
PAPU
PAWK
¾
ADCR
PAPU
PAWK
¾
CTRL0
PAPU
PAWK
CO
I/T
ST
AN
ST
¾
AN
ST
ST
AN
ST
ST
AN
ST
ST
¾
ST
¾
O/T
Description
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
A/D channel 0
CMOS General purpose I/O. Register enabled pull-up and wake-up.
CMOS PFD output
¾
A/D channel 1
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
¾
External Timer 0 clock input
A/D channel 2
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
¾
External interrupt input
A/D channel 3
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External Timer 1 clock input
CMOS PWM output
CMOS General purpose I/O. Register enabled pull-up and wake-up.
OSC
Oscillator pin
Rev.1.10
3
February 12, 2010
HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
Pin Name
Function
PA6
PA6/OSC1
OSC1
PA7
PA7/RES
RES
VDD
VSS
Note:
VDD
VSS
CO
¾
¾
ST
PWR
PWR
OPT
PAPU
PAWK
CO
PAWK
I/T
ST
OSC
ST
O/T
Description
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
Oscillator pin
NMOS General purpose I/O. Register enabled wake-up.
¾
¾
¾
Reset input
Power supply
Ground
I/T: Input type
O/T: Output type
OPT: Optional by configuration option (CO) or register option
PWR: Power
CO: Configuration option
ST: Schmitt Trigger input
CMOS: CMOS output
The important point to note here is that the PB0 and PB1 pads will not be bounded to pins in the 10-pin MSOP
package. These two pads default to an input state, the designer should set the register PBPU to pull high op-
tions. In this way, these two internal pads can be pulled up in order to prevent input pin floating power con-
sumption.
HT48R01B/HT48R02B
Pin Name
PA0
Function
PA0
PA1
PA1/PFD
PFD
PA2
PA2/TC0
TC0
PA3
PA3/INT
INT
PA4
PA4/TC1
TC1
PA5
PA5/OSC2
OSC2
PA6
PA6/OSC1
OSC1
PA7
PA7/RES
RES
VDD
VSS
VDD
VSS
CO
¾
¾
ST
PWR
PWR
OPT
PAPU
PAWK
PAPU
PAWK
CTRL0
PAPU
PAWK
¾
PAPU
PAWK
¾
PAPU
PAWK
¾
PAPU
PAWK
CO
PAPU
PAWK
CO
PAWK
I/T
ST
ST
¾
ST
ST
ST
ST
ST
ST
ST
¾
ST
OSC
ST
O/T
Description
CMOS General purpose I/O. Register enabled pull-up and wake-up.
CMOS General purpose I/O. Register enabled pull-up and wake-up.
CMOS PFD output
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External Timer 0 clock input
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External interrupt input
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External Timer 1 clock input
CMOS General purpose I/O. Register enabled pull-up and wake-up.
OSC
Oscillator pin
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
Oscillator pin
NMOS General purpose I/O. Register enabled wake-up.
¾
¾
¾
Reset input
Power supply
Ground
Rev.1.10
4
February 12, 2010
HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
Note:
I/T: Input type
O/T: Output type
OPT: Optional by configuration option (CO) or register option
PWR: Power
CO: Configuration option
ST: Schmitt Trigger input
CMOS: CMOS output
The important point to note here is that the PB0 and PB1 pads will not be bounded to pins in the 10-pin MSOP
package. These two pads default to an input state, the designer should set the register PBPU to pull high op-
tions. In this way, these two internal pads can be pulled up in order to prevent input pin floating power con-
sumption.
HT46R01N/HT46R02N
Pin Name
Function
PA0
PA0/AN0
AN0
PA1
PA1/PFD/AN1
PFD
AN1
PA2
PA2/TC0/AN2
TC0
AN2
PA3
PA3/INT/AN3
INT
AN3
PA4
PA4/TC1/PWM
TC1
PWM
PA5
PA5/OSC2
OSC2
PA6
PA6/OSC1
OSC1
PA7
PA7/RES
RES
PB0
PB1
VDD
VSS
PB0
PB1
VDD
VSS
CO
PBPU
PBPU
¾
¾
ST
ST
ST
PWR
PWR
OPT
PAPU
PAWK
ADCR
PAPU
PAWK
CTRL0
ADCR
PAPU
PAWK
¾
ADCR
PAPU
PAWK
¾
ADCR
PAPU
PAWK
¾
CTRL0
PAPU
PAWK
CO
PAPU
PAWK
CO
PAWK
I/T
ST
AN
ST
¾
AN
ST
ST
AN
ST
ST
AN
ST
ST
¾
ST
¾
ST
OSC
ST
O/T
Description
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
A/D channel 0
CMOS General purpose I/O. Register enabled pull-up and wake-up.
CMOS PFD output
¾
A/D channel 1
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
¾
External Timer 0 clock input
A/D channel 2
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
¾
External interrupt input
A/D channel 3
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
External Timer 1 clock input
CMOS PWM output
CMOS General purpose I/O. Register enabled pull-up and wake-up.
OSC
Oscillator pin
CMOS General purpose I/O. Register enabled pull-up and wake-up.
¾
Oscillator pin
NMOS General purpose I/O. Register enabled wake-up.
¾
Reset input
CMOS General purpose I/O. Register enabled.
CMOS General purpose I/O. Register enabled.
¾
¾
Power supply
Ground
Rev.1.10
5
February 12, 2010
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