AT26DF081A-SU datasheet, PDF - EEWORLD Datasheet

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Features

•

Single 2.7V - 3.6V Supply

•

Serial Peripheral Interface (SPI) Compatible

•

– Supports SPI Modes 0 and 3

70 MHz Maximum Clock Frequency

Flexible, Uniform Erase Architecture

– 4-Kbyte Blocks

– 32-Kbyte Blocks

– 64-Kbyte Blocks

– Full Chip Erase

Individual Sector Protection with Global Protect/Unprotect Feature

– One 32-Kbyte Top Boot Sector

– Two 8-Kbyte Sectors

– One 16-Kbyte Sector

– Fifteen 64-Kbyte Sectors

Hardware Controlled Locking of Protected Sectors

Flexible Programming Options

– Byte/Page Program (1 to 256 Bytes)

– Sequential Program Mode Capability

Automatic Checking and Reporting of Erase/Program Failures

JEDEC Standard Manufacturer and Device ID Read Methodology

Low Power Dissipation

– 5 mA Active Read Current (Typical)

– 25

μA

Deep Power-down Current (Typical)

Endurance: 100,000 Program/Erase Cycles

Data Retention: 20 Years

Complies with Full Industrial Temperature Range

Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options

– 8-lead SOIC (150-mil and 200-mil wide)

•

8-megabit

2.7-volt

Minimum

SPI Serial Flash

Memory

AT26DF081A

(Not Recommended

for New Designs)

•

1. Description

The AT26DF081A is a serial interface Flash memory device designed for use in a

wide variety of high-volume consumer-based applications in which program code is

shadowed from Flash memory into embedded or external RAM for execution. The

flexible erase architecture of the AT26DF081A, with its eras\e granularity as small as

4 Kbytes, makes it ideal for data storage as well, eliminating the need for additional

data storage EEPROM devices.

The physical sectoring and the erase block sizes of the AT26DF081A have been opti-

mized to meet the needs of today’s code and data storage applications. By optimizing

the size of the physical sectors and erase blocks, the memory space can be used

much more efficiently. Because certain code modules and data storage segments

must reside by themselves in their own protected sectors, the wasted and unused

memory space that occurs with large sectored and large block erase Flash memory

devices can be greatly reduced. This increased memory space efficiency allows addi-

tional code routines and data storage segments to be added while still maintaining the

same overall device density.

3600I–DFLASH–5/2013

The AT26DF081A also offers a sophisticated method for protecting individual sectors against

erroneous or malicious program and erase operations. By providing the ability to individually pro-

tect and unprotect sectors, a system can unprotect a specific sector to modify its contents while

keeping the remaining sectors of the memory array securely protected. This is useful in applica-

tions where program code is patched or updated on a subroutine or module basis, or in

applications where data storage segments need to be modified without running the risk of errant

modifications to the program code segments. In addition to individual sector protection capabili-

ties, the AT26DF081A incorporates Global Protect and Global Unprotect features that allow the

entire memory array to be either protected or unprotected all at once. This reduces overhead

during the manufacturing process since sectors do not have to be unprotected one-by-one prior

to initial programming.

Specifically designed for use in 3-volt systems, the AT26DF081A supports read, program, and

erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage is required for

programming and erasing.

2

AT26DF081A

3600I–DFLASH–5/2013

AT26DF081A

2. Pin Descriptions and Pinouts

Table 2-1.

Symbol

Pin Descriptions

Name and Function

CHIP SELECT: Asserting the CS pin selects the device. When the CS pin is deasserted, the

device will be deselected and normally be placed in standby mode (not Deep Power-down mode),

and the SO pin will be in a high-impedance state. When the device is deselected, data will not be

accepted on the SI pin.

A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition

is required to end an operation. When ending an internally self-timed operation such as a program

or erase cycle, the device will not enter the standby mode until the completion of the operation.

SERIAL CLOCK: This pin is used to provide a clock to the device and is used to control the flow of

data to and from the device. Command, address, and input data present on the SI pin is always

latched on the rising edge of SCK, while output data on the SO pin is always clocked out on the

falling edge of SCK.

SERIAL INPUT: The SI pin is used to shift data into the device. The SI pin is used for all data input

including command and address sequences. Data on the SI pin is always latched on the rising

edge of SCK.

SERIAL OUTPUT: The SO pin is used to shift data out from the device. Data on the SO pin is

always clocked out on the falling edge of SCK.

WRITE PROTECT: The WP pin controls the hardware locking feature of the device. Please refer to

section

“Protection Commands and Features” on page 15

for more details on protection features

and the WP pin.

The WP pin is internally pulled-high and may be left floating if hardware-controlled protection will

not be used. However, it is recommended that the WP pin also be externally connected to V

CC

whenever possible.

HOLD: The HOLD pin is used to temporarily pause serial communication without deselecting or

resetting the device. While the HOLD pin is asserted, transitions on the SCK pin and data on the

SI pin will be ignored, and the SO pin will be in a high-impedance state.

The CS pin must be asserted, and the SCK pin must be in the low state in order for a Hold

condition to start. A Hold condition pauses serial communication only and does not have an effect

on internally self-timed operations such as a program or erase cycle. Please refer to section

“Hold”

on page 30

for additional details on the Hold operation.

The HOLD pin is internally pulled-high and may be left floating if the Hold function will not be used.

However, it is recommended that the HOLD pin also be externally connected to V

CC

whenever

possible.

DEVICE POWER SUPPLY: The V

CC

pin is used to supply the source voltage to the device.

Operations at invalid V

CC

voltages may produce spurious results and should not be attempted.

GROUND: The ground reference for the power supply. GND should be connected to the

system ground.

Asserted

State

Type

CS

Low

Input

SCK

Input

SI

Input

SO

Output

WP

Low

Input

HOLD

Low

Input

V

CC

GND

Power

3

3600I–DFLASH–5/2013

Figure 2-1.

CS

SO

WP

GND

8-SOIC Top View

1

2

3

4

8

7

6

5

VCC

HOLD

SCK

SI

3. Block Diagram

CS

CONTROL AND

PROTECTION LOGIC

I/O BUFFERS

AND LATCHES

SCK

SI

SO

SRAM

DATA BUFFER

INTERFACE

CONTROL

AND

LOGIC

ADDRESS LATCH

Y-DECODER

Y-GATING

WP

X-DECODER

FLASH

MEMORY

ARRAY

4. Memory Array

To provide the greatest flexibility, the memory array of the AT26DF081A can be erased in four

levels of granularity including a full chip erase. In addition, the array has been divided into phys-

ical sectors of various sizes, of which each sector can be individually protected from program

and erase operations. The sizes of the physical sectors are optimized for both code and data

storage applications, allowing both code and data segments to reside in their own isolated

regions.

Figure 4-1 on page 5

illustrates the breakdown of each erase level as well as the break-

down of each physical sector.

4

AT26DF081A

3600I–DFLASH–5/2013

AT26DF081A

Figure 4-1.

Memory Architecture Diagram

Block Erase Detail

Internal Sectoring for

Sector Protection

Function

64KB

32KB

Block Erase

(D8h Command) (52h Command)

4KB

Block Erase

(20h Command)

4KB

•••

Page Program Detail

Block Address

Range

0FFFFFh

0FEFFFh

0FDFFFh

0FCFFFh

0FBFFFh

0FAFFFh

0F9FFFh

0F8FFFh

0F7FFFh

0F6FFFh

0F5FFFh

0F4FFFh

0F3FFFh

0F2FFFh

0F1FFFh

0F0FFFh

0EFFFFh

0EEFFFh

0EDFFFh

0ECFFFh

0EBFFFh

0EAFFFh

0E9FFFh

0E8FFFh

0E7FFFh

0E6FFFh

0E5FFFh

0E4FFFh

0E3FFFh

0E2FFFh

0E1FFFh

0E0FFFh

–

0FF000h

0FE000h

0FD000h

0FC000h

0FB000h

0FA000h

0F9000h

0F8000h

0F7000h

0F6000h

0F5000h

0F4000h

0F3000h

0F2000h

0F1000h

0F0000h

0EF000h

0EE000h

0ED000h

0EC000h

0EB000h

0EA000h

0E9000h

0E8000h

0E7000h

0E6000h

0E5000h

0E4000h

0E3000h

0E2000h

0E1000h

0E0000h

1-256 Byte

Page Program

(02h Command)

256 Bytes

•••

Page Address

Range

0FFFFFh

0FFEFFh

0FFDFFh

0FFCFFh

0FFBFFh

0FFAFFh

0FF9FFh

0FF8FFh

0FF7FFh

0FF6FFh

0FF5FFh

0FF4FFh

0FF3FFh

0FF2FFh

0FF1FFh

0FF0FFh

0FEFFFh

0FEEFFh

0FEDFFh

0FECFFh

0FEBFFh

0FEAFFh

0FE9FFh

0FE8FFh

–

0FFF00h

0FFE00h

0FFD00h

0FFC00h

0FFB00h

0FFA00h

0FF900h

0FF800h

0FF700h

0FF600h

0FF500h

0FF400h

0FF300h

0FF200h

0FF100h

0FF000h

0FEF00h

0FEE00h

0FED00h

0FEC00h

0FEB00h

0FEA00h

0FE900h

0FE800h

32KB

(Sector 18)

32KB

8KB

(Sector 17)

8KB

(Sector 16)

16KB

(Sector 15)

64KB

32KB

64KB

(Sector 14)

64KB

32KB

64KB

(Sector 0)

64KB

32KB

4KB

00FFFFh

00EFFFh

00DFFFh

00CFFFh

00BFFFh

00AFFFh

009FFFh

008FFFh

007FFFh

006FFFh

005FFFh

004FFFh

003FFFh

002FFFh

001FFFh

000FFFh

–

00F000h

00E000h

00D000h

00C000h

00B000h

00A000h

009000h

008000h

007000h

006000h

005000h

004000h

003000h

002000h

001000h

000000h

256 Bytes

0017FFh

0016FFh

0015FFh

0014FFh

0013FFh

0012FFh

0011FFh

0010FFh

000FFFh

000EFFh

000DFFh

000CFFh

000BFFh

000AFFh

0009FFh

0008FFh

0007FFh

0006FFh

0005FFh

0004FFh

0003FFh

0002FFh

0001FFh

0000FFh

–

001700h

001600h

001500h

001400h

001300h

001200h

001100h

001000h

000F00h

000E00h

000D00h

000C00h

000B00h

000A00h

000900h

000800h

000700h

000600h

000500h

000400h

000300h

000200h

000100h

000000h

•••

5

3600I–DFLASH–5/2013

Parameter Name	Attribute value
Number of functions	1
Number of terminals	8
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	2.7 V
Rated supply voltage	3 V
maximum clock frequency	70 MHz
Processing package description	0.209 INCH, Green, EIAJ, Plastic, SOIC-8
Lead-free	Yes
EU RoHS regulations	Yes
state	DISCONTINUED
packaging shape	Rectangle
Package Size	SMALL OUTLINE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	1.27 mm
terminal coating	MATTE Tin
Terminal location	pair
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
memory width	1
organize	8M × 1
storage density	8.39E6 deg
operating mode	Synchronize
Number of digits	8.39E6 words
Number of digits	8M
Memory IC type	FLASH 2.7V programmable read-only memory
serial parallel	serial

	AT26DF081A-SU	AT26DF081A_13	AT26DF081A-SSU
Description	8M X 1 FLASH 2.7V PROM, PDSO8	8M X 1 FLASH 2.7V PROM, PDSO8	8M X 1 FLASH 2.7V PROM, PDSO8
Number of functions	1	1	1
Number of terminals	8	8	8
Maximum operating temperature	85 Cel	85 Cel	85 Cel
Minimum operating temperature	-40 Cel	-40 Cel	-40 Cel
Maximum supply/operating voltage	3.6 V	3.6 V	3.6 V
Minimum supply/operating voltage	2.7 V	2.7 V	2.7 V
Rated supply voltage	3 V	3 V	3 V
maximum clock frequency	70 MHz	70 MHz	70 MHz
Processing package description	0.209 INCH, Green, EIAJ, Plastic, SOIC-8	0.150 INCH, Green, Plastic, MS-012AA, SOIC-8	0.150 INCH, Green, Plastic, MS-012AA, SOIC-8
Lead-free	Yes	Yes	Yes
EU RoHS regulations	Yes	Yes	Yes
state	DISCONTINUED	DISCONTINUED	DISCONTINUED
packaging shape	Rectangle	Rectangle	Rectangle
Package Size	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
surface mount	Yes	Yes	Yes
Terminal form	GULL WING	GULL WING	GULL WING
Terminal spacing	1.27 mm	1.27 mm	1.27 mm
terminal coating	MATTE Tin	MATTE Tin	MATTE Tin
Terminal location	pair	pair	pair
Packaging Materials	Plastic/Epoxy	Plastic/Epoxy	Plastic/Epoxy
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
memory width	1	1	1
organize	8M × 1	8M × 1	8M × 1
storage density	8.39E6 deg	8.39E6 deg	8.39E6 deg
operating mode	Synchronize	Synchronize	Synchronize
Memory IC type	FLASH 2.7V programmable read-only memory	FLASH 2.7V programmable read-only memory	FLASH 2.7V programmable read-only memory
serial parallel	serial	serial	serial
Number of digits	8M	8M	8M

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