1. Can the parasitic inductance of a via be understood as a small inductor connected in series with the wire?
2. To whom does the parasitic capacitance of the via refer? If the parasitic inductance an...
[i=s]This post was last edited by xinmeng_wit on 2022-1-19 22:09[/i]Why can't I find DMA channel allocation in the manual?As shown in the following picture:...
Every day, hundreds of thousands of electronic design engineers in China are busy designing innovative electronic products. Many of them have the ideal of pushing China's IC design to the forefront of...
[i=s]This post was last edited by Litthins on 2019-10-28 10:56[/i]I'm a student. My last Atmel XPLAINED development board has been taken away. Here's another GigaDevice GD32 E231C-START development bo...