IRFP150N
TM
Data Sheet
March 2000
File Number
4844
44A, 100V, 0.030 Ohm, N-Channel Power MOSFET
Packaging
JEDEC TO-247
SOURCE
DRAIN
GATE
Features
• Ultra Low On-Resistance
- r
DS(ON)
= 0.030Ω,
V
GS
=
10V
• Simulation Models
- Temperature Compensated PSPICE™ and SABER
©
Electrical Models
- Spice and SABER
©
Thermal Impedance Models
- www.intersil.com
• Peak Current vs Pulse Width Curve
DRAIN
(TAB)
• UIS Rating Curve
Ordering Information
Symbol
D
PART NUMBER
IRFP150N
PACKAGE
TO-247
BRAND
IRFP150N
G
S
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
IRFP150N
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (T
C
= 25
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Continuous (T
C
= 100
o
C, V
GS
= 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Derate Above 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
L
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
NOTES:
1. T
J
= 25
o
C to 150
o
C.
100
100
±20
44
31
Figure 4
Figures 6, 14, 15
155
1.03
-55 to 175
300
260
V
V
V
A
A
W
W/
o
C
o
C
o
C
o
C
CAUTION:
Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation. SABER© is a Copyright of Analogy Inc.
1-888-INTERSIL or 321-724-7143
|
Intersil and Design is a trademark of Intersil Corporation.
|
Copyright
©
Intersil Corporation 2000
IRFP150N
Electrical Specifications
PARAMETER
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
DSS
I
D
= 250µA, V
GS
= 0V (Figure 11)
V
DS
= 95V, V
GS
= 0V
V
DS
= 90V, V
GS
= 0V, T
C
= 150
o
C
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
Thermal Resistance Junction to Case
Thermal Resistance Junction to
Ambient
R
θJC
R
θJA
TO-247
-
-
-
-
0.97
30
o
C/W
o
C/W
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
100
-
-
-
-
-
-
-
-
1
250
±100
V
µA
µA
nA
I
GSS
V
GS
=
±20V
V
GS(TH)
r
DS(ON)
V
GS
= V
DS
, I
D
= 250µA (Figure 10)
I
D
= 44A, V
GS
= 10V (Figure 9)
2
-
-
0.0255
4
0.030
V
Ω
SWITCHING SPECIFICATIONS
(V
GS
= 10V)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Gate Charge at 10V
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain "Miller" Charge
CAPACITANCE SPECIFICATIONS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
C
ISS
C
OSS
C
RSS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz
(Figure 12)
-
-
-
1700
460
145
-
-
-
pF
pF
pF
Q
g(TOT)
Q
g(10)
Q
g(TH)
Q
gs
Q
gd
V
GS
= 0V to 20V
V
GS
= 0V to 10V
V
GS
= 0V to 2V
V
DD
= 50V,
I
D
= 44A,
I
g(REF)
= 1.0mA
(Figures 13, 16, 17)
-
-
-
-
-
90
48
3.1
6.5
17
108
58
3.8
-
-
nC
nC
nC
nC
nC
t
ON
t
d(ON)
t
r
t
d(OFF)
t
f
t
OFF
V
DD
= 50V, I
D
= 44A
V
GS
=
10V,
R
GS
= 6.2Ω
(Figures 18, 19)
-
-
-
-
-
-
-
11
75
37
61
-
130
-
-
-
-
150
ns
ns
ns
ns
ns
ns
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
SYMBOL
V
SD
I
SD
= 44A
I
SD
= 22A
Reverse Recovery Time
Reverse Recovered Charge
t
rr
Q
RR
I
SD
= 44A, dI
SD
/dt = 100A/µs
I
SD
= 44A, dI
SD
/dt = 100A/µs
TEST CONDITIONS
MIN
-
-
-
-
TYP
-
-
-
-
MAX
1.25
1.00
105
305
UNITS
V
V
ns
nC
2
IRFP150N
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
175
T
C
, CASE TEMPERATURE (
o
C)
50
I
D
, DRAIN CURRENT (A)
40
V
GS
= 10V
30
20
20
0
25
50
75
100
125
150
175
T
C
, CASE TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs
CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
1
THERMAL IMPEDANCE
Z
θJC
, NORMALIZED
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
10
-3
10
-2
t, RECTANGULAR PULSE DURATION (s)
10
-1
10
0
10
1
SINGLE PULSE
0.01
10
-5
10
-4
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
600
T
C
= 25
o
C
FOR TEMPERATURES
ABOVE 25
o
C DERATE PEAK
CURRENT AS FOLLOWS:
I = I
25
V
GS
= 10V
100
175 - T
C
150
I
DM
, PEAK CURRENT (A)
30
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
-4
10
-3
10
-2
t, PULSE WIDTH (s)
10
-1
10
0
10
1
10
-5
FIGURE 4. PEAK CURRENT CAPABILITY
3
IRFP150N
Typical Performance Curves
300
SINGLE PULSE
T
J
= MAX RATED
T
C
= 25
o
C
(Continued)
300
I
D
, DRAIN CURRENT (A)
100
I
AS
, AVALANCHE CURRENT (A)
If R = 0
t
AV
= (L)(I
AS
)/(1.3*RATED BV
DSS
- V
DD
)
If R
≠
0
t
AV
= (L/R)ln[(I
AS
*R)/(1.3*RATED BV
DSS
- V
DD
) +1]
100
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
100µs
10
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
1ms
10ms
1
1
10
100
300
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
10
0.001
0.01
0.1
1
t
AV
, TIME IN AVALANCHE (ms)
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
80
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
DD
= 15V
60
80
V
GS
= 20V
V
GS
= 10V
V
GS
= 7V
V
GS
= 6V
I
D,
DRAIN CURRENT (A)
I
D
, DRAIN CURRENT (A)
60
V
GS
=5V
40
40
T
J
= 175
o
C
20
T
J
= -55
o
C
T
J
= 25
o
C
20
0
2
3
4
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
6
0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T
C
= 25
o
C
0
1
2
3
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
4
FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. SATURATION CHARACTERISTICS
3.0
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION =
80µs
DUTY CYCLE = 0.5% MAX
2.5
V
GS
= 10V, I
D
= 44A
NORMALIZED GATE
THRESHOLD VOLTAGE
1.2
V
GS
= V
DS
, I
D
= 250µA
1.0
2.0
1.5
0.8
1.0
0.6
-80
-40
160
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
200
-80
-40
0
40
80
120
160
200
T
J
, JUNCTION TEMPERATURE (
o
C)
0.5
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
4
IRFP150N
Typical Performance Curves
1.2
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
(Continued)
6000
V
GS
= 0V, f = 1MHz
C, CAPACITANCE (pF)
I
D
= 250µA
1.1
1000
C
OSS
≅
C
DS
+ C
GD
C
ISS
=
C
GS
+ C
GD
1.0
100
C
RSS
=
C
GD
0.9
-80
-40
0
40
80
120
160
200
T
J
, JUNCTION TEMPERATURE (
o
C)
30
0.1
1.0
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
DD
= 50V
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
I
D
= 44A
I
D
= 22A
0
10
20
30
Q
g
, GATE CHARGE (nC)
40
50
2
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
V
DS
BV
DSS
L
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
V
GS
DUT
t
P
R
G
I
AS
V
DD
-
t
P
V
DS
V
DD
+
0V
I
AS
0.01Ω
0
t
AV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
5
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