ATA5723C/ATA5724C/ATA5728C
UHF ASK/FSK Receiver
DATASHEET
Features
●
Frequency receiving range of (3 versions)
●
f
0
= 312.5MHz to 317.5MHz or
●
f
0
= 431.5MHz to 436.5MHz or
●
f
0
= 868MHz to 870MHz
●
30dB image rejection
●
Receiving bandwidth
●
B
IF
= 300kHz for 315MHz/433MHz version
●
B
IF
= 600kHz for 868MHz version
●
Fully integrated LC-VCO and PLL loop filter
●
Very high sensitivity with power matched LNA
●
Atmel
®
ATA5723C/ATA5724C:
●
–107dBm, FSK, BR_0 (1.0Kbit/s to 1.8Kbit/s), Manchester, BER 10E-3
●
–113dBm, ASK, BR_0 (1.0Kbit/s to 1.8Kbit/s), Manchester, BER 10E-3
●
Atmel ATA5728C:
●
–105dBm, FSK, BR_0 (1.0Kbit/s to 1.8Kbit/s), Manchester, BER 10E-3
●
–111dBm, ASK, BR_0 (1.0Kbit/s to 1.8Kbit/s), Manchester, BER 10E-3
●
High system IIP3
●
–18dBm at 868MHz
●
–23dBm at 433MHz
●
–24dBm at 315MHz
●
System 1-dB compression point
●
–27.7dBm at 868MHz
●
–32.7dBm at 433MHz
●
–33.7dBm at 315MHz
●
High large-signal capability at GSM band (blocking –33dBm at +10MHz,
IIP3 = –24dBm at +20MHz)
●
Logarithmic RSSI output
●
XTO start-up with negative resistor of 1.5kΩ
●
5V to 20V automotive compatible data interface
●
Data clock available for Manchester and bi-phase-coded signals
●
Programmable digital noise suppression
9248D-RKE-10/14
●
Low power consumption due to configurable polling
●
Temperature range –40°C to +105°C
●
ESD protection 2kV HBM, all pins
●
Communication to microcontroller possible using a single bi-directional data line
●
Low-cost solution due to high integration level with minimum external circuitry requirements
●
Supply voltage range 4.5V to 5.5V
Benefits
●
Low BOM list due to high integration
●
Use of low-cost 13MHz crystal
●
Lowest average current consumption for application due to self polling feature
●
Reuse of Atmel
®
ATA5743 software
●
World-wide coverage with one PCB due to 3 versions are pin compatible
2
ATA5723C/ATA5724C/ATA5728C [DATASHEET]
9248D–RKE–10/14
1.
Description
The Atmel
®
ATA5723C/ATA5724C/ATA5728C is a multi-chip PLL receiver device supplied in an SSO20 package. It has
been specially developed for the demands of RF low-cost data transmission systems with data rates from 1Kbit/s to
10kBbit/s in Manchester or bi-phase code. Its main applications are in the areas of keyless entry systems, tire pressure
monitoring systems, telemetering, and security technology systems. It can be used in the frequency receiving range of
f
0
= 312.5MHz to 317.5MHz, f
0
= 431.5MHz to 436.5MHz or f
0
= 868MHz to 870MHz for ASK or FSK data transmission. All
the statements made below refer to 315MHz, 433MHz and 868.3MHz applications.
Figure 1-1. System Block Diagram
UHF ASK/FSK
Remote Control Transmitter
T5750/53/54
UHF ASK/FSK
Remote Control Receiver
ATA5723C/
ATA5724C/
ATA5728C
Demod.
PLL
Antenna
VCO
Antenna
IF Amp
PLL
XTO
1 to 5
Control
Micro-
controller
XTO
Power
amp.
LNA
VCO
Figure 1-2. Block Diagram
FSK/ASK
Demodulator
and Data Filter
RSSI
Limiter out
RSSI
SENS
AVCC
AGND
DGND
DVCC
LPF
f
g
= 2.2MHz
Standby
Logic
4. Order
f
0
= 1MHz
FE
CLK
IC_ACTIVE
IF
Amp.
Sensitivity
Reduction
Polling Circuit
and Control Logic
POLLING/_ON
Dem_out
CDEM
Data
Interface
DATA
RSSI
DATA_CLK
MODE
IF
Amp.
Loop
Filter
XTAL2
XTO
XTAL1
Poly-LPF
f
g
= 7MHz
f
LC-VCO
:2
or :3
LNAREF
f
LNA_IN
LNAGND
LNA
:2
or :4
f
:128
or :64
ATA5723C/ATA5724C/ATA5728C [DATASHEET]
9248D–RKE–10/14
3
2.
Pin Configuration
Figure 2-1. Pinning SSO20
SENS
IC_ACTIVE
CDEM
AVCC
TEST1
RSSI
AGND
LNAREF
LNA_IN
1
2
3
4
5
6
7
8
9
ATA5723C/
ATA5724C/
ATA5728C
20 DATA
19 POLLING/_ON
18 DGND
17 DATA_CLK
16 MODE
15 DVCC
14 XTAL2
13 XTAL1
12 TEST3
11 TEST2
LNAGND 10
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Description
Symbol
SENS
IC_ACTIVE
CDEM
AVCC
TEST 1
RSSI
AGND
LNAREF
LNA_IN
LNAGND
TEST 2
TEST 3
XTAL1
XTAL2
DVCC
MODE
DATA_CLK
DGND
POLLING/_ON
DATA
Function
Sensitivity-control resistor
IC condition indicator: Low = sleep mode, High = active mode
Lower cut-off frequency data filter
Analog power supply
Test pin, during operation at GND
RSSI output
Analog ground
High-frequency reference node LNA and mixer
RF input
DC ground LNA and mixer
Do not connect during operating
Test pin, during operation at GND
Crystal oscillator XTAL connection 1
Crystal oscillator XTAL connection 2
Digital power supply
Selecting 315MHz/other versions
Low: 315MHz version (Atmel ATA5723C)
High: 433MHz/868MHz versions (Atmel ATA5724C/ATA5728C)
Bit clock of data stream
Digital ground
Selects polling or receiving mode; Low: receiving mode, High: polling mode
Data output/configuration input
4
ATA5723C/ATA5724C/ATA5728C [DATASHEET]
9248D–RKE–10/14
3.
RF Front-end
The RF front-end of the receiver is a low-IF heterodyne configuration that converts the input signal into about 1MHz IF signal
with a typical image rejection of 30dB. According to Figure
Figure 1-2 on page 3
the front-end consists of an LNA (low noise
amplifier), LO (local oscillator), I/Q mixer, polyphase low-pass filter and an IF amplifier.
The PLL generates the drive frequency f
LO
for the mixer using a fully integrated synthesizer with integrated low noise
LC-VCO (voltage controlled oscillator) and PLL-loop filter. The XTO (crystal oscillator) generates the reference frequency
f
REF
= f
XTO
/2 (868MHz and 433MHz versions) or f
REF
= f
XTO
/3 (315MHz version). The integrated LC-VCO generates two or
four times the mixer drive frequency f
VCO
. The I/Q signals for the mixer are generated with a divide by two or four circuit
(f
LO
= f
VCO
/2 for 868MHz version, f
LO
= f
VCO
/4 for 433MHz and 315MHz versions). f
VCO
is divided by a factor of 128 or 64 and
feeds into a phase frequency detector and is compared with f
REF
. The output of the phase frequency detector is fed into an
integrated loop filter and thereby generates the control voltage for the VCO. If f
LO
is determined, f
XTO
can be calculated using
the following formula:
f
REF
= f
LO
/128 for 868MHz band, f
REF
= f
LO
/64 for 433MHz bands, f
REF
= f
LO
/64 for 315MHz bands.
The XTO is a two-pin oscillator that operates at the series resonance of the quartz crystal with high current but low voltage
signal, so that there is only a small voltage at the crystal oscillator frequency at pins XTAL1 and XTAL2. According to
Figure 3-1,
the crystal should be connected to GND with two capacitors C
L1
and C
L2
from XTAL1 and XTAL2 respectively.
The value of these capacitors are recommended by the crystal supplier. Due to an inductive impedance at steady state
oscillation and some PCB parasitics, a lower value of C
L1
and C
L2
is normally necessary.
The value of C
Lx
should be optimized for the individual board layout to achieve the exact value of f
XTO
and hence of f
LO
. (The
best way is to use a crystal with known load resonance frequency to find the right value for this capacitor.) When designing
the system in terms of receiving bandwidth and local oscillator accuracy, the accuracy of the crystal and the XTO must be
considered.
Figure 3-1. XTO Peripherals
DVCC
XTAL2
XTAL1
C
L1
TEST3
TEST2
V
S
C
L2
The nominal frequency f
LO
is determined by the RF input frequency f
RF
and the IF frequency f
IF
using the following formula
(low-side injection):
f
LO
= f
RF
– f
IF
To determine f
LO
, the construction of the IF filter must be considered. The nominal IF frequency is f
IF
= 950kHz. To achieve a
good accuracy of the filter corner frequencies, the filter is tuned by the crystal frequency f
XTO
. This means that there is a fixed
relationship between f
IF
and f
LO
.
f
IF
= f
LO
/318 for the 315MHz band (Atmel
®
ATA5723C)
f
IF
= f
LO
/438 for the 433.92MHz band (Atmel ATA5724C)
f
IF
= f
LO
/915 for the 868.3MHz band (Atmel ATA5728C)
The relationship is designed to achieve the nominal IF frequency of:
f
IF
= 987kHz for the 315MHz and B
IF
= 300kHz (Atmel ATA5723C)
f
IF
= 987kHz for the 433.92MHz and B
IF
= 300kHz (Atmel ATA5724C)
f
IF
= 947.8kHz for the 868.3MHz and B
IF
= 600kHz (Atmel ATA5728C)
The RF input either from an antenna or from an RF generator must be transformed to the RF input pin LNA_IN. The input
impedance of this pin is provided in the electrical parameters. The parasitic board inductances and capacitances influence
the input matching. The RF receiver Atmel ATA5723C/ATA5724C/ATA5728C exhibits its highest sensitivity if the LNA is
power matched. Because of this, matching to a SAW filter, a 50Ω or an antenna is easier.
Figure 14-1 on page 29
shows a
typical input matching network for f
RF
= 315MHz, f
RF
= 433.92MHz or f
RF
= 868.3MHz to 50Ω. The input matching network
shown in
Table 14-2 on page 29
is the reference network for the parameters given in the electrical characteristics.
ATA5723C/ATA5724C/ATA5728C [DATASHEET]
9248D–RKE–10/14
5
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