SF25W1381CALQ datasheet, PDF - EEWORLD Datasheet

SF25W1381CALQ: DescriptionFixed Resistor, Thin Film, 0.75W, 1380ohm, 200V, 0.25% +/-Tol, 10ppm/Cel, Surface Mount, 2512, CHIP; CategoryPassive components The resistor; File Size673KB，10 Pages; ManufacturerWalsin Technology Corporation; Environmental Compliance

Download Datasheet Parametric View All

SF25W1381CALQ Overview

Fixed Resistor, Thin Film, 0.75W, 1380ohm, 200V, 0.25% +/-Tol, 10ppm/Cel, Surface Mount, 2512, CHIP

Parameter Name	Attribute value
Is it Rohs certified?	conform to
package instruction	CHIP
Reach Compliance Code	compliant
ECCN code	EAR99
Other features	ANTI-SULFUR, HIGH PRECISION, LASER TRIMMABLE
structure	Rectangular
Installation features	SURFACE MOUNT
Number of terminals	2
Maximum operating temperature	155 °C
Minimum operating temperature	-55 °C
Package height	0.55 mm
Package length	6.35 mm
Package form	SMT
Package width	3.2 mm
method of packing	TR, PLASTIC, 7 INCH
Rated power dissipation(P)	0.75 W
Rated temperature	70 °C
Guideline	AEC-Q200
resistance	1380 Ω
Resistor type	FIXED RESISTOR
size code	2512
surface mount	YES
technology	THIN FILM
Temperature Coefficient	10 ppm/°C
Terminal shape	WRAPAROUND
Tolerance	0.25%
Operating Voltage	200 V

MSP430 analog-to-digital conversion module--ADC12: [i=s]This post was last edited by fish001 on 2020-9-13 16:30[/i]The ADC12 module of the MSP430 microcontroller is a 12-bit precision A/D conversion module, which has the characteristics of high speed ...; fish001 Microcontroller MCU

Haha!! Put your date of birth and month of birth together and see what it is???: I am a willful loli :shy:...; 千百顺ict测试仪 Talking

[Repost] Popular Science of Components: An Inventory of Various Buses: Before talking about the bus, we should first understand what the bus is. Baidu's complete definition is: the bus is a public communication trunk line for transmitting information between various func...; 皇华Ameya360 Power technology

Computer-aided Design of Frequency Capture Process of Phase-locked Loop: [Abstract] Based on the mathematical analysis of the frequency capture process of a phase-locked loop, the basic method and calculation procedure for simulating the frequency capture process of a phas...; JasonYoo Analog electronics

EEWORLD University Hall----Live Replay: Application of TI Sitara? Products in Smart Grid: Live replay: Application of TI Sitara? products in smart grid : https://training.eeworld.com.cn/course/5672...; hi5 Integrated technical exchanges

Verilog Programming Questions: A black gold AX301 development board, the main control chip is Altera's EP4CE6F17C8; a GPRS module, the communication chip is SIM900. The AX301 development board is connected to the GPRS module throug...; 静静地期待 FPGA/CPLD

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components