Si91821
Vishay Siliconix
Micropower 300-mA CMOS LDO Regulator With Error Flag
FEATURES
D
Input Voltage: 2.35−6.0 V
D
Fixed 1.8-V, 2.5-V, 2.8-V, 3.0-V, 3.3-V, 5.0-V, or
Adjustable Output Voltage Options
D
Low 120-mV Dropout at 300-mA Load
D
Guaranteed 300-mA Output Current
D
500-mA Peak Output Current Capability
D
Uses Low ESR Ceramic Output Capacitor
D
Fast Load and Line Transient Response
D
Only 100-mV(rms) Noise With Noise Bypass
Capacitor
D
1-mA Maximum Shutdown Current
D
Built-in Short Circuit and Thermal Protection
D
Out-Of-Regulation Error Flag (Power_Good)
Available
APPLICATIONS
D
Cellular Phones
D
Laptop and Palm Computers
D
PDA, Digital Still Cameras
DESCRIPTION
The Si91821 is a 300-mA CMOS LDO (low dropout) voltage
regulator. The device features ultra low ground current and
dropout voltage to prolong battery life in portable electronics.
The Si91821 offers line and load transient response and ripple
rejection superior to that of bipolar or BiCMOS LDO regulators.
The device is designed to maintain regulation while delivering
500-mA peak current. This is useful for systems that have high
surge current upon turn-on. The Si91821 is designed to drive
the lower cost ceramic, as well as tantalum, output capacitors.
The device is guaranteed stable from maximum load current
down to 0-mA load. In addition, an external noise bypass
capacitor connected to the device’s C
NOISE
pin will lower the
LDO’s output noise for low noise applications.
The Si91821 also includes an out-of-regulation error flag.
When the output voltage is 5% below its nominal output
voltage, the error flag output goes low.
The Si91821 is available in both standard and lead (Pb)-free
MSOP-8 packages and is specified to operate over the
industrial temperature range of
−40
_C
to 85
_C.
TYPICAL APPLICATIONS CIRCUITS
7
V
IN
2.2
mF
GND
3
2
6
SD
V
IN
C
NOISE
GND
ERROR
V
OUT
SET
8
1, 4
5
2.2
mF
Optional
2.2
mF
GND
3
V
OUT
V
IN
7
2
6
SD
V
IN
C
NOISE
GND
ERROR
V
OUT
SET
8
1, 4
5
2.2
mF
V
OUT
Si91821
Figure 1.
Fixed Output
Figure 2..
Si91821
Adjustable Output
ON/OFF
V
IN
2.2
mF
GND
7
2
6
0.033
mF
3
SD
V
IN
C
NOISE
GND
ERROR
V
OUT
SET
8
1, 4
5
1 MW
POWER_GOOD
V
OUT
2.2
mF
Si91821
Figure 3.
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
Fixed Output, Low Noise, Full Features Application
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1
Si91821
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V
SD Input Voltage, V
SD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
IN
Output Current, I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
Output Voltage, V
OUT
. . . . . . . . . . . . . . . . . . . . . . . .
−0.3
V to V
O(nom)
+ 0.3 V
Maximum Junction Temperature, T
J(max)
. . . . . . . . . . . . . . . . . . . . . . . 150_C
Storage Temperature, T
STG
. . . . . . . . . . . . . . . . . . . . . . . . . .
−55_C
to 150_C
ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Power Dissipation (Package)
a
8-Pin MSOP
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 666 mW
Thermal Impedance (Q
JA
)
a
8-Pin MSOP
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185_C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 10 mW/_C above T
A
= 25_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.35 V to 6 V
Output Voltage, V
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 to 5.0 V
SD Input Voltage, V
SD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
IN
I
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 300 mA
Operating Ambient Temperature, T
A
. . . . . . . . . . . . . . . . . . . .
−40_C
to 85_C
Operating Junction Temperature, T
J
. . . . . . . . . . . . . . . . . . .
−40_C
to 125_C
C
IN
= 2.2
mF,
C
OUT
= 2.2
mF
(ceramic, X5R or X7R type) , C
NOISE
= 0.033
mF
(ceramic)
C
OUT
Range = 1
mF
to 10
mF
("10%, x5R or x7R type)
C
IN
w
C
OUT
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Parameter
Input Voltage
Output Voltage
Output Voltage Accuracy
(to stated output voltage)
Feedback Voltage (ADJ Version)
Line Regulation
(Except 5-V Version)
Line Regulation (5-V Version)
Line Regulation (ADJ Version)
V
IN
DV
OUT
100
V
OUT(nom)
Limits
−40
to 85_C
Symbol
V
IN
V
OUT
V
OUT
V
SET
V
IN
= V
OUT(nom)
+ 1 V I
OUT
= 1 mA
V,
A
C
IN
= 2.2
mF,
C
OUT
= 2.2
mF,
V
SD
= 1.5 V
Temp
a
Min
b
2.35
Typ
c
Max
b
6.0
5.0
1.5
2.5
Unit
Adjustable Version
1 mA
v
I
OUT
v
300 mA
Full
Room
Full
Room
Full
1.5
−1.5
−2.5
1.191
1.179
−0.18
−0.18
−0.18
−0.18
5
80
120
150
500
600
0.1
500
260
37
54
60
50
40
1.215
V
%
V
OUT(nom)
V
1.239
1.251
0.18
0.18
0.18
0.18
20
135
200
270
From V
IN
= V
OUT(nom)
+ 1 V
to V
OUT(nom)
+ 2 V
From V
IN
= 5.5 V to 6 V
V
OUT
= 1.5 V From V
IN
= 2.5 V to 3.5 V
V
OUT
= 5 V From V
IN
= 5.5 V to 6 V
I
OUT
= 10 mA
V
IN
−
V
OUT
I
OUT
= 200 mA
I
OUT
= 300 mA
I
OUT
= 0 mA
Full
Full
Full
Full
Room
Full
Full
Full
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
%/V
Dropout Voltage
d
p
g
mV
Ground Pin Current
Shutdown Supply Current
Peak Output Current
I
GND
I
IN(off)
I
O(peak)
I
OUT
= 200 mA
I
OUT
= 300 mA
V
SD
= 0 V
V
OUT
w
0.95 x V
OUT(nom)
, t
pw
= 2 ms
BW = 10 Hz to 100 kHz
I
OUT
= 150 mA
BW = 10 to 100 kHz
I
OUT
= 10 mA
I
OUT
= 150 mA
w/o C
NOISE
C
NOISE
= 0.1
mF
C
NOISE
= 33 nF
f = 1 kHz
mA
1
mA
Output Noise Voltage
e
N
mV
(rms)
Ripple Rejection
pp
j
DV
OUT
/DV
IN
f = 10 kHz
f = 100 kHz
dB
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Document Number: 71614
S-51147–Rev. E, 20-Jun-05
Si91821
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Parameter
Symbol
V
IN
= V
OUT(nom)
+ 1 V, I
OUT
= 1 mA
C
IN
= 2.2
mF,
C
OUT
= 2.2
mF,
V
SD
= 1.5 V
Limits
−40
to 85_C
Temp
a
Min
b
Typ
c
Max
b
Unit
Dynamic Line Regulation
Dynamic Load Regulation
Turn-on Overshoot
V
OUT
Turn-On-Time
DV
O(line)
DV
O(load)
DV
OOS
t
ON
V
IN
: V
OUT(nom)
+ 1 V to V
OUT(nom)
+ 2 V
t
r
/t
f
= 5
ms,
I
OUT
= 250 mA
I
OUT
: 1 mA to 150 mA, t
r
/t
f
= 2
ms
V
IN
followed by SD = High Event
C
NOISE
v
100 nF
C
OUT
= 10
mF,
V
OUT
to 90% of final value,
V
IN
= 3.6 V
Room
Room
Room
Room
10
30
2.5
350
mV
%
mS
Thermal Shutdown
Thermal Shutdown Junction Temp
Thermal Hysteresis
Short Circuit Current
T
J(s/d)
T
HYST
I
SC
V
OUT
= 0 V
Room
Room
Room
165
20
800
_C
mA
Shutdown Input
SD Input Voltage
SD Input Current
e
Shutdown Hysteresis
V
IH
V
IL
I
IH
I
IL
V
HYST
High = Regulator ON (Rising)
Low = Regulator OFF (Falling)
V
SD
= 0 V, Regulator OFF
V
SD
= 6 V, Regulator ON
Full
Full
Room
Room
Full
0.01
1.0
100
1.5
V
IN
0.4
V
mA
mV
Error Output
Output High Leakage
Output Low Voltage
Power_Good Trip
(Rising)
Hysteresis
f
Error Delay
Threshold
f, g
I
OFF
V
OL
V
TH
V
HYST
t
DELAY
C
NOISE
v
100 nF
ERROR = V
OUT(nom)
I
SINK
= 2 mA
Full
Full
Full
Room
Full
0.93 x
V
OUT
0.95 x
V
OUT
2% x
V
OUT
10
mS
0.01
2
0.4
0.97 x
V
OUT
V
mA
Notes
a. Room = 25_C, Full =
−40
to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at T
A
= 25_C.
d. The dropout voltage is defined as V
IN
−
V
OUT
when V
OUT
is 100 mV below the value of V
OUT
for V
IN
= V
OUT
+ 2 V. This is applicable for voltages of 2.5 V or
higher.
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f.
V
OUT
is defined as the output voltage of the DUT at 1 mA.
g. Typical only, from V
OUT
= 2.0 V to V
OUT
= 1.5 V.
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
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Si91821
Vishay Siliconix
TIMING WAVEFORMS
V
IH
SD
t
ON
V
NOM =
0.95 V
NOM
V
OUT
V
IL
ERROR
t
DELAY
t
DELAY
Figure 4.
Timing Diagram for Power-Up
PIN CONFIGURATION
MSOP-8
v
OUT
v
IN
GND
V
OUT
1
2
3
4
8
7
6
5
ERROR
SD
C
NOISE
SET
Top View
PIN DESCRIPTION
Pin Number
1, 4
2
3
5
6
7
8
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Name
V
OUT
V
IN
GND
SET
C
NOISE
SD
ERROR
Function
Output voltage. Connect C
OUT
between this pin and ground.
Input supply pin. Bypass this pin with a 2.2-mF ceramic or tantalum capacitor to ground.
Ground pin. Local ground for C
NOISE
and C
OUT
.
For fixed output voltage versions, this pin could be connected to GND. For adjustable output voltage version, this
voltage feedback pin sets the output voltage via an external resistor divider.
Noise bypass pin. For low noise applications, a 0.01-mF or larger ceramic capacitor should be connected from this pin
to ground.
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to V
IN
if unused.
This open drain output is an error flag output which goes low when V
OUT
drops 5% below its nominal voltage.
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
4
Si91821
Vishay Siliconix
BLOCK DIAGRAM
Switches shown for device in normal operating mode (SD = HIGH)
5
V
IN
C
IN
2.2
mF
2
SET
6
C
NOISE
SD
ON
OFF
7
RFB2
6 MW
RFB1
+
+
−
60 mV
2
mA
+
−
To V
IN
1, 4
C
OUT
2.2
mF
R
EXT
V
OUT
GND
3
1.215 V
V
REF
+
−
−
+
8
ERROR
Figure 5.
300-mA CMOS LDO Regulator
5
V
IN
C
IN
2.2
mF
2
SET
6
C
NOISE
R
2
SD
ON
OFF
6 MW
+
+
−
7
V
SET
R
1
+
−
60 mV
2
mA
To V
IN
1, 4
C
OUT
2.2
mF
R
EXT
V
OUT
GND
3
1.215 V
V
REF
+
−
−
+
8
ERROR
Figure 6.
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
300-mA CMOS LDO Regulator (Adjustable Output)
www.vishay.com
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Analog electronics
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