PBSS4041PX
60 V, 5 A PNP low V
CEsat
(BISS) transistor
Rev. 01 — 1 April 2010
Product data sheet
1. Product profile
1.1 General description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor in a medium power and
flat lead SOT89 (SC-62) Surface-Mounted Device (SMD) plastic package.
NPN complement: PBSS4041NX.
1.2 Features and benefits
Very low collector-emitter saturation voltage V
CEsat
High collector current capability I
C
and I
CM
High collector current gain (h
FE
) at high I
C
High energy efficiency due to less heat generation
AEC-Q101 qualified
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
1.3 Applications
Loadswitch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
1.4 Quick reference data
Table 1.
Symbol
V
CEO
I
C
I
CM
R
CEsat
[1]
Quick reference data
Parameter
collector-emitter voltage
collector current
peak collector current
collector-emitter
saturation resistance
single pulse;
t
p
≤
1 ms
I
C
=
−4
A;
I
B
=
−400
mA
[1]
Conditions
open base
Min
-
-
-
-
Typ
-
-
-
40
Max
−60
−5
−15
60
Unit
V
A
A
mΩ
Pulse test: t
p
≤
300
μs; δ ≤
0.02.
NXP Semiconductors
PBSS4041PX
60 V, 5 A PNP low V
CEsat
(BISS) transistor
2. Pinning information
Table 2.
Pin
1
2
3
Pinning
Description
emitter
collector
base
3
2
1
3
1
006aaa231
Simplified outline
Graphic symbol
2
3. Ordering information
Table 3.
Ordering information
Package
Name
PBSS4041PX
SC-62
Description
plastic surface-mounted package; 3 leads
Version
SOT89
Type number
4. Marking
Table 4.
Marking codes
Marking code
[1]
*6G
Type number
PBSS4041PX
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
peak collector current
base current
single pulse;
t
p
≤
1 ms
Conditions
open emitter
open base
open collector
Min
-
-
-
-
-
-
Max
−60
−60
−5
−5
−15
−1
Unit
V
V
V
A
A
A
PBSS4041PX_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 1 April 2010
2 of 15
NXP Semiconductors
PBSS4041PX
60 V, 5 A PNP low V
CEsat
(BISS) transistor
Table 5.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
P
tot
Parameter
total power dissipation
Conditions
T
amb
≤
25
°C
[1]
[2]
[3]
Min
-
-
-
-
−55
−65
Max
600
1650
2500
150
+150
+150
Unit
mW
mW
mW
°C
°C
°C
T
j
T
amb
T
stg
[1]
[2]
[3]
junction temperature
ambient temperature
storage temperature
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
3.0
P
tot
(W)
2.0
006aac174
(1)
(2)
1.0
(3)
0.0
−75
−25
25
75
125
175
T
amb
(°C)
(1) Ceramic PCB, Al
2
O
3
, standard footprint
(2) FR4 PCB, mounting pad for collector 6 cm
2
(3) FR4 PCB, standard footprint
Fig 1.
Power derating curves
PBSS4041PX_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 1 April 2010
3 of 15
NXP Semiconductors
PBSS4041PX
60 V, 5 A PNP low V
CEsat
(BISS) transistor
6. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to ambient
Conditions
in free air
[1]
[2]
[3]
Min
-
-
-
-
Typ
-
-
-
-
Max
210
75
50
20
Unit
K/W
K/W
K/W
K/W
R
th(j-sp)
[1]
[2]
[3]
thermal resistance from
junction to solder point
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 6 cm
2
.
Device mounted on a ceramic PCB, Al
2
O
3
, standard footprint.
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.2
0.1
10
0.02
0.01
1
0
0.05
0.5
006aac175
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig 2.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS4041PX_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 1 April 2010
4 of 15
NXP Semiconductors
PBSS4041PX
60 V, 5 A PNP low V
CEsat
(BISS) transistor
10
2
duty cycle = 1
Z
th(j-a)
(K/W)
10
0.05
0.02
1
0.01
0
0.75
0.5
0.33
0.2
0.1
006aac176
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, mounting pad for collector 6 cm
2
Fig 3.
10
2
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
006aac177
duty cycle = 1
Z
th(j-a)
(K/W)
10
0.75
0.5
0.33
0.2
0.1
0.05
1
0.02
0
0.01
10
−1
10
−5
10
−4
10
−3
10
−2
10
−1
1
10
10
2
t
p
(s)
10
3
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 4.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS4041PX_1
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 1 April 2010
5 of 15
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