7MP6121S33M datasheet, PDF - EEWORLD Datasheet

7MP6121S33M: DescriptionCache Tag SRAM Module, 32KX32, CMOS, PDMA128; Categorystorage storage; File Size311KB，5 Pages; ManufacturerIDT (Integrated Device Technology)

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7MP6121S33M Overview

Cache Tag SRAM Module, 32KX32, CMOS, PDMA128

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
package instruction	DIMM, DIMM128
Reach Compliance Code	_compli
ECCN code	EAR99
Maximum clock frequency (fCLK)	33 MHz
I/O type	COMMON
JESD-30 code	R-PDMA-N128
JESD-609 code	e0
memory density	1048576 bi
Memory IC Type	CACHE TAG SRAM MODULE
memory width	32
Number of terminals	128
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	32KX32
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	DIMM
Encapsulate equivalent code	DIMM128
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.115 A
Minimum standby current	4.75 V
Maximum slew rate	0.935 mA
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	NO LEAD
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30

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