5962-00-493-5992 datasheet, PDF

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5962-00-493-5992: DescriptionJ-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDIP16,; Categorylogic logic; File Size229KB，6 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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5962-00-493-5992 Overview

J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDIP16,

5962-00-493-5992 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Fairchild
package instruction	DIP, DIP16,.3
Reach Compliance Code	compli
JESD-30 code	R-XDIP-T16
Logic integrated circuit type	J-K FLIP-FLOP
Humidity sensitivity level	2A
Number of functions	2
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	250
power supply	5 V
Certification status	Not Qualified
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
Trigger type	MASTER-SLAVE

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Description	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDIP16,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, PDIP16,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, PDIP16,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDIP16,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDIP16,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDFP16,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDFP16,	J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, PDIP16,
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
package instruction	DIP, DIP16,.3	DIP, DIP16,.3	DIP, DIP16,.3	DIP, DIP16,.3	DIP, DIP16,.3	DFP, FL16,.3	DFP, FL16,.3	DIP, DIP16,.3
Reach Compliance Code	compli	compliant	unknown	compliant	compliant	compliant	compliant	compli
JESD-30 code	R-XDIP-T16	R-PDIP-T16	R-PDIP-T16	R-XDIP-T16	R-XDIP-T16	R-XDFP-F16	R-XDFP-F16	R-PDIP-T16
Logic integrated circuit type	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP	J-K FLIP-FLOP
Humidity sensitivity level	2A	2A	2A	2A	2A	2A	2A	2A
Number of functions	2	2	2	2	2	2	2	2
Number of terminals	16	16	16	16	16	16	16	16
Maximum operating temperature	125 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
Package body material	CERAMIC	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC	CERAMIC	CERAMIC	CERAMIC	PLASTIC/EPOXY
encapsulated code	DIP	DIP	DIP	DIP	DIP	DFP	DFP	DIP
Encapsulate equivalent code	DIP16,.3	DIP16,.3	DIP16,.3	DIP16,.3	DIP16,.3	FL16,.3	FL16,.3	DIP16,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE	IN-LINE	FLATPACK	FLATPACK	IN-LINE
Peak Reflow Temperature (Celsius)	250	250	250	250	250	250	250	250
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO	YES	YES	NO
technology	TTL	TTL	TTL	TTL	TTL	TTL	TTL	TTL
Temperature level	MILITARY	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	FLAT	FLAT	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	1.27 mm	1.27 mm	2.54 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30	30	30	30	30
Trigger type	MASTER-SLAVE	MASTER-SLAVE	MASTER-SLAVE	MASTER-SLAVE	MASTER-SLAVE	MASTER-SLAVE	MASTER-SLAVE	MASTER-SLAVE
Maker	Fairchild	Fairchild	Fairchild	-	-	Fairchild	Fairchild	Fairchild
Certification status	Not Qualified	Not Qualified	-	Not Qualified	-	-	Not Qualified	Not Qualified
JESD-609 code	-	e0	e0	e0	e0	e0	e0	-
Terminal surface	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-
Base Number Matches	-	1	1	1	1	1	1	-

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