EP20K160EFC672-2 datasheet, PDF

EP20K160EFC672-2: DescriptionLoadable PLD, PBGA672, 27 X 27 MM, 1 MM PITCH, FINE LINE, BGA-672; CategoryProgrammable logic devices Programmable logic; File Size4MB，208 Pages; ManufacturerAltera (Intel)

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EP20K160EFC672-2 Overview

Loadable PLD, PBGA672, 27 X 27 MM, 1 MM PITCH, FINE LINE, BGA-672

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Altera (Intel)
Parts packaging code	BGA
package instruction	BGA,
Contacts	672
Reach Compliance Code	compli
maximum clock frequency	160 MHz
JESD-30 code	S-PBGA-B672
JESD-609 code	e1
length	27 mm
Humidity sensitivity level	3
Dedicated input times	4
Number of I/O lines	324
Number of terminals	672
Maximum operating temperature	85 °C
Minimum operating temperature
organize	4 DEDICATED INPUTS, 324 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Programmable logic type	LOADABLE PLD
Certification status	Not Qualified
Maximum seat height	2.1 mm
Maximum supply voltage	1.89 V
Minimum supply voltage	1.71 V
Nominal supply voltage	1.8 V
surface mount	YES
Temperature level	OTHER
Terminal surface	TIN SILVER COPPER
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
width	27 mm

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