IDTQS532805Q datasheet, PDF - EEWORLD Datasheet

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IDTQS532805Q: DescriptionLow Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20; Categorylogic logic; File Size98KB，6 Pages; ManufacturerIDT (Integrated Device Technology)

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IDTQS532805Q Overview

Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20

IDTQS532805Q Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
Parts packaging code	QSOP
package instruction	SSOP,
Contacts	20
Reach Compliance Code	unknown
Input adjustment	SCHMITT TRIGGER
JESD-30 code	R-PDSO-G20
JESD-609 code	e0
length	8.6614 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Number of functions	2
Number of inverted outputs
Number of terminals	20
Actual output times	5
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE WITH SERIES RESISTOR
Package body material	PLASTIC/EPOXY
encapsulated code	SSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH
propagation delay (tpd)	6.5 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.9 ns
Maximum seat height	1.7272 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	DUAL
width	3.9116 mm

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QS532805/A/B

GUARANTEED LOW SKEW 3.3V CMOS CLOCK DRIVER/BUFFER

INDUSTRIAL TEMPERATURE RANGE

GUARANTEED LOW SKEW

3.3V CMOS CLOCK

DRIVER/BUFFER

FEATURES:

−

JEDEC compatible LVTTL level inputs and outputs

10 output, low skew clock signal buffer

Monitor output

Clock inputs are 5V tolerant

Pinout and function compatible with QS5805T

25Ω on-chip resistors for low noise

Input hysteresis for better noise margin

Guaranteed low skew:

•

0.7ns output skew

•

0.7ns pulse skew

•

1ns part-to-part skew

Std., A, and B speed grades (B speed in QSOP package only)

Available in QSOP and SOIC packages

QS532805/A/B

DESCRIPTION

The QS532805 clock buffer/driver circuits can be used for clock buffering

schemes where low skew is a key parameter. This device offers two banks

of 5 non-inverting outputs. The QS532805 incorporates 25Ω series

termination resistors. This clock buffer product is designed for use in high

performance workstations, embedded and personal computing systems

using 3V to 3.6V supply voltages. Several can be used in parallel or

scattered throughout a system for guaranteed low skew, system-wide clock

distribution networks. The QS532805 can accept 5V input and control

signals.

The QS532805 is characterized for operation at -40°C to +85°C.

−

FUNCTIONAL BLOCK DIAGRAM

OEA

INA

OA5

OA1

MON

INB

OB5

OB1

OEB

NOTE:

QS532805 has a 25Ω series termination resistor on each clock output, including monitor.

INDUSTRIAL TEMPERATURE RANGE

1999

Integrated Device Technology, Inc.

JULY 2000

DSC-5785/-

IDTQS532805Q Related Products

	IDTQS532805Q	IDTQS532805ASO	IDTQS532805AQ	IDTQS532805AQ8	IDTQS532805BQ	IDTQS532805BQ8	IDTQS532805SO	IDTQS532805SO8	IDTQS532805ASO8	IDTQS532805Q8
Description	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20	Low Skew Clock Driver, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QSOP	SOIC	QSOP	QSOP	QSOP	QSOP	SOIC	SOIC	SOIC	QSOP
package instruction	SSOP,	SOP,	SSOP,	SSOP,	SSOP,	SSOP,	SOP,	SOP,	SOP,	SSOP,
Contacts	20	20	20	20	20	20	20	20	20	20
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Input adjustment	SCHMITT TRIGGER	SCHMITT TRIGGER	SCHMITT TRIGGER	SCHMITT TRIGGER	SCHMITT TRIGGER	SCHMITT TRIGGER	SCHMITT TRIGGER	SCHMITT TRIGGER	SCHMITT TRIGGER	SCHMITT TRIGGER
JESD-30 code	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	8.6614 mm	12.8 mm	8.6614 mm	8.6614 mm	8.6614 mm	8.6614 mm	12.8 mm	12.8 mm	12.8 mm	8.6614 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
Number of functions	2	2	2	2	2	2	2	2	2	2
Number of terminals	20	20	20	20	20	20	20	20	20	20
Actual output times	5	5	5	5	5	5	5	5	5	5
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR	3-STATE WITH SERIES RESISTOR
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SSOP	SOP	SSOP	SSOP	SSOP	SSOP	SOP	SOP	SOP	SSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH
propagation delay (tpd)	6.5 ns	5.8 ns	5.8 ns	5.8 ns	5.2 ns	5.2 ns	6.5 ns	6.5 ns	5.8 ns	6.5 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.9 ns	0.9 ns	0.9 ns	0.9 ns	0.9 ns	0.9 ns	0.9 ns	0.9 ns	0.9 ns	0.9 ns
Maximum seat height	1.7272 mm	2.65 mm	1.7272 mm	1.7272 mm	1.7272 mm	1.7272 mm	2.65 mm	2.65 mm	2.65 mm	1.7272 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.635 mm	1.27 mm	0.635 mm	0.635 mm	0.635 mm	0.635 mm	1.27 mm	1.27 mm	1.27 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	3.9116 mm	7.5 mm	3.9116 mm	3.9116 mm	3.9116 mm	3.9116 mm	7.5 mm	7.5 mm	7.5 mm	3.9116 mm

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