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User’s Guide
www.dalsemi.com
High-Speed Microcontroller
User Guide
SmartSocket 16K/64K
SECTION 1: INTRODUCTION
The Dallas Semiconductor High-Speed Microcontroller is an 8051-compatible device that provides
improved performance and power consumption compared to the original version. It retains instruction set
and object code compatibility with the 8051, yet performs the same operations in fewer clock cycles.
Consequently, more throughput is possible for the same crystal speed. As an alternative, the High-Speed
Microcontroller can be run slowly to save power. The more efficient design allows a much slower crystal
speed to get the same results as an original 8051, using much less power.
The fundamental innovation of the High-Speed Microcontroller is the use of only four clocks per
instruction cycle compared with twelve for the original 8051. This results in up to 3 times improvement
in performance. In addition, the High-Speed Microcontroller is updated with several new peripherals and
features while providing all of the standard features of an 80C32. These include 256 bytes of on-chip
RAM, 32 I/O ports, three 16-bit timer/counters, and an on-chip UART. All devices provide 256 bytes of
RAM for variables and stack. 128 bytes can be reached using direct addressing and 128 using indirect
addressing.
In addition to improved efficiency, members of the High-Speed Microcontroller family can operate at a
maximum clock rate of 33 or 40 MHz. Combined with the 3 times performance, this allows for a
maximum performance equivalent to a 99 or 120 MHz 8051. This level of computing power is
comparable to many 16-bit processors, but without the added expense and complexity if implementing a
16-bit interface.
A number of peripherals were added to the original 80C32 core when designing the High-Speed
Microcontroller family. Some devices have a programmable watchdog Timer to supervise the system. It
will count up to a user programmable interval and then reset the CPU unless cleared by software. Other
features such as a second, full-function UART and dual data pointers are available to minimize external
interrupts allows greater flexibility in dealing with external events.
Some members of the High-Speed Microcontroller family incorporate Power Management Modes which
allow the device to dynamically vary the internal clock speed from 4 clocks per cycle (default) to 64 or
1024 clocks per cycle. Because power consumption is directly proportional to clock speed, the device
can reduce its operating frequency during periods of little or no activity. This greatly reduces power
consumption. The switch-back feature allows the device to quickly return in divide by 4 mode upon
receipt of an interrupt or serial port activity, allowing the device to respond to external events while in
Power Management Mode.
Various memory configurations are available with the High-Speed Microcontroller family. EPROM and
Mask programmable ROM versions are available for program memory. Some versions incorporate
extended MOVX SRAM on-chip, reducing or eliminating the need for external data memory. This
memory can be made nonvolatile in the DS87C530 through the use of an external lithium battery.
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SECTION 2: ORDERING INFORMATION
The High-Speed Microcontroller family follows the part numbering convention shown below. Note that
all combinations of devices are not currently available. Please refer to individual data sheets for the
available versions.
DS80C320-MCG
SPEED:
D
G
L
R
C
N
M
Q
E
F
W
K
0
3
0
3
7
18 MHz
25 MHz
33 MHz
40 MHz
0°C to 70°C
-40°C to +85°C
PLASTIC
PLCC
THIN PLASTIC QUAD FLAT PACK (TQFP)
PLASTIC QUAD FLAT PACK (QFP)
WINDOWED CERDIP
WINDOWED CERQUAD
+5V
+3V OR WIDE VOLTAGE
ROMless
ROM
EPROM
TEMPERATURE:
PACKAGE:
OPERATING VOLTAGE:
MEMORY TYPE:
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SECTION 3: ARCHITECTURE
The High-Speed Microcontroller is based on the industry standard 80C52. The core is an accumulator
based architecture using internal registers for data storage and peripheral control. It executes the standard
8051 instruction set. This section provides a brief description of each architecture feature. Details
concerning the programming model, instruction set, and register description are provided in Section 4.
ALU
The ALU is responsible for math functions, comparisons, and general decision making in the High-Speed
Microcontroller. The ALU is not explicitly used by software. Instruction decoding prepares the ALU
automatically and passes it the appropriate data. The ALU primarily uses two special function registers
(SFRs) as the source and destination for all operations. These are the Accumulator and B register. The
ALU also provides status information in the Program Status Register. The SFRs are described below.
SPECIAL FUNCTION REGISTERS
All peripherals and operations that are not explicit instructions in the High-Speed Microcontroller are
controlled via Special Function Registers (SFRs). All SFRs are described in Section 4. The most
commonly used registers that are basic to the architecture are also described below.
Accumulator
The Accumulator is the primary register used in the High-Speed Microcontroller. It is the source and
destination of most math, data movement, decisions, and other operations. Although it can be bypassed,
most high-speed instructions require the use of the Accumulator (ACC) as one argument.
B Register
The B register is used as the second 8-bit argument in multiply and divide operations. When not used for
these purposes, the B register can be used as a general purpose register.
Program Status Word
The Program Status Word holds a selection of bit flags that include the Carry Flag, Auxiliary Carry Flag,
General Purpose Flag, Register Bank Select, Overflow Flag, and Parity Flag.
Data Pointer(s)
The Data Pointer is used to designate a memory address for the MOVX instruction. This address can
point to a MOVX RAM location, either on- or off-chip, or a memory mapped peripheral. When moving
data from one memory area to another or from memory to a memory mapped peripheral, a pointer is
needed for both the source and destination. Thus the High-Speed Microcontroller offers two data
pointers. The user selects the active pointer via a dedicated SFR bit.
Stack Pointer
The microcontroller provides a Stack in the scratchpad RAM area discussed below. The Stack Pointer
denotes the register location at the top of the Stack, which is the last used value. The user can place the
Stack anywhere in scratchpad RAM by setting the Stack Pointer to that location.
I/O Ports
The standard High-Speed Microcontroller offers four 8-bit I/O ports. ROM less versions use Port 0 and
Port 2 as address and data busses. In those versions, only two ports are available for general purpose I/O.
Each I/O port is a Special Function Register that can be written or read. The I/O port has a latch that
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retains the value which software writes. In general, during a read operation, software reads the state of
the external pin. Each port is represented by a SFR location.
Timer/Counters
Three 16-bit Timer/Counters are available in the High-Speed Microcontroller. Each timer is contained in
two SFR locations that can be written or read by software. The timers are controlled by other SFRs
described in Section 4.
UARTs
The High-Speed Microcontroller provides one or two UARTs. These are controlled and accessed as
SFRs. Each UART has an address that is used to read or write the UART. The same address is used for
both read and write operations. The microcontroller distinguishes between a read and a write by the
instruction. Each UART is controlled by its own SFR control register.
SCRATCHPAD REGISTERS (RAM)
The High-Speed Core provides 256 bytes of Scratchpad RAM for general purpose data and variable
storage. The first 128 bytes are directly available to software. The second 128 are available through
indirect addressing discussed below. Selected portions of this RAM have other optional functions.
Stack
The stack is a RAM area that the microcontroller uses to store return address information during Calls
and Interrupts. The user can also place variables on the stack when necessary. The Stack Pointer
mentioned above designates the RAM location that is the top of the stack. Thus, depending on the value
of the Stack Pointer, the stack can be located anywhere in the 256 bytes of RAM. A common location
would be in the upper 128 bytes of RAM, as these are accessible through indirect addressing only.
Working Registers
The first thirty-two bytes of the Scratchpad RAM can be used as four banks of eight Working Registers
for high speed data movement. Using four banks, software can quickly change context by simply
changing to a different bank. In addition to the Accumulator, the Working Registers are commonly used
as data source or destination. Some of the Working Registers can also be used as pointers to other RAM
locations (indirect addressing).
PROGRAM COUNTER
The Program Counter (PC) is a 16-bit value that designates the next program address to be fetched. On-
chip hardware automatically increments the PC value to move to the next ROM location.
ADDRESS/DATA BUS
The High-Speed Microcontroller addresses a 64KB program and 64KB data memory area. In the
ROMless versions, all memory is outside. Other versions use a combination of internal and external
memory. When external memory is accessed, Ports 0 and 2 are used as a multiplexed address and data
bus. Port 2 provides the address MSB. Even versions with internal memory can use the bus on Ports 0
and 2 to access more memory.
WATCHDOG TIMER
The Watchdog Timer provides a supervisory function for applications that cannot afford to run out of
control. The Watchdog Timer is a programmable free running timer. If allowed to reach the termination
of its count, if enabled, the Watchdog will reset the CPU. Software must prevent this by cleaning or
resetting the Watchdog prior to its time-out.
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POWER MONITOR
Some members of the High-Speed Microcontroller family incorporate a band-gap reference and analog
circuitry to monitor the power supply conditions. V
CC
begins to drop out of tolerance, the Power Monitor
will issue an optional early warning Power-fail interrupt. If power continues to fall, the Power Monitor
will invoke a reset condition. This will remain until power returns to normal operating voltage. The
Power Monitor also functions on power-up, holding the microcontroller in a reset state until power is
stable.
INTERRUPTS
The High-Speed Microcontroller is capable of evaluating a number of interrupt sources simultaneously.
Each version of the High-Speed Microcontroller provides a different number of interrupt sources. Each
interrupt has an associated interrupt vector, flag, priority, and enable. These interrupts can be globally
enabled or disabled.
TIMING CONTROL
The High-Speed Microcontroller provides an on-chip oscillator for use with an external crystal. This can
be bypassed by injecting a clock source into the XTAL 1 pin. The clock source is used to create machine
cycle timing (four clocks), ALE,
PSEN
, Watchdog, Timer, and serial baud rate timing. In addition, some
devices incorporate an on-chip ring oscillator which can be used to provide an approximately 2-4 MHz
clock source.
REAL-TIME CLOCK
The DS87C530 incorporates a real-time clock (RTC), which is accessed via SFR locations. The RTC is
divided into hour, minute, second, and subsecond registers, and also incorporates a 65536 day calendar.
Alarm registers allow the RTC to issue interrupts at a specific time once a day, or as a recurring alarm
every hour, minute or second. An external watch crystal and lithium power source allow the processor to
maintain timekeeping in the absence of V
CC
.
FEATURE SUMMARY
The High-Speed Microcontroller family offers a combination of features and peripherals as shown in
Table 3-1. This User’s Guide is designed as a comprehensive guide covering all features available in the
High-Speed Microcontroller family. The designer should investigate the specific data sheet to determine
which features are available on a particular device. Detailed information about newer members of the
product family may be provided in separate documents until they can be assimlilated into the High-Speed
Microcontroller User’s Guide.
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