Ordering number : EN6142
CMOS IC
LC75742E, 75742W
1/2 Duty VFD Driver with Key Input Function
Overview
The LC75742E and LC75742W are 1/2 duty VFD drivers
that can be used for electronic tuning frequency display
and other applications under the control of a micro-
controller. These products can directly drive VFDs with
up to 82 segments. It also includes a key scan circuit and
can support input from up to 30 keys and can thus reduce
the number of lines to the front panel in application
systems.
Package Dimensions
unit: mm
3151-QFP64E
[LC75742E]
17.2
14.0
0.35
33
48
49
32
1.0
1.6
1.0
0.8
1.6
1.0
0.15
• Key input from up to 30 keys
(Key scans are only performed when keys are pressed.)
• 82 segment outputs.
• Noise reduction circuits are built into the output drivers.
• Serial data I/O supports CCB format communication
with the system controller.
• Dimmer and sleep mode can be controlled by serial data
input.
• High generality since display data is displayed without
the intervention of a decoder.
• All segments can be turned off with the BLK pin.
0.8
Features
17.2
14.0
17
1.0
64
1
16
3.0max
0.8
32
17
0.1
2.7
15.6
SANYO: QFP64E (QIP64E)
unit: mm
3190-SQFP64
[LC75742W]
12.0
10.0
1.25
48
49
0.5
0.18
1.25
33
0.15
12.0
10.0
0.5
64
1.25
1
16
0.5
0.1
0.5
1.7max
1.25
SANYO: SQFP64
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
43099TH (OT) No. 6142-1/18
LC75742E, LC75742W
Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Parameter
Maximum Supply voltage
Symbol
V
DD
max
V
FL
max
V
IN
1
V
IN
2
V
OUT
1
Output voltage
V
OUT
2
V
OUT
3
I
OUT
1
Output current
I
OUT
2
I
OUT
3
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
Tstg
V
DD
V
FL
DI, CL, CE, BLK
OSCI, KI1 to KI5
S1 to S41, G1, G2
OSCO, KS1 to KS6
DO
S1 to S41
G1, G2
KS1 to KS6
Ta = 85°C (LC75742E)
Ta = 85°C (LC75742W)
Conditions
Ratings
–0.3 to +6.5
–0.3 to +21.0
–0.3 to +6.5
–0.3 to V
DD
+0.3
–0.3 to V
FL
+0.3
–0.3 to V
DD
+0.3
–0.3 to +6.5
6
60
1
400
300
–40 to +85
–50 to +150
Unit
V
V
V
V
V
V
V
mA
mA
mA
mW
mW
°C
°C
Input voltage
Allowable Operating Ranges
at Ta = –40 to +85°C, V
DD
= 4.5 to 5.5 V, V
SS
= 0 V
Parameter
Symbol
V
DD
V
FL
V
IH
1
High-level input voltage
V
IH
2
V
IH
3
Low-level input voltage
Guaranteed oscillator frequency range
Recommended external resistor value
Recommended external capacitor value
Clock low-level pulse width
Clock high-level pulse width
Data setup time
Data hold time
CE wait time
CE setup time
CE hold time
DO output delay time
DO rise time
BLK switching time
V
IL
f
OSC
R
OSC
C
OSC
t
øL
t
øH
t
ds
t
dh
t
cp
t
cs
t
ch
t
dc
t
dr
t
c
V
DD
V
FL
DI, CL, CE, BLK
OSCI
KI1 to KI5
DI, CL, CE, BLK, OSCI, KI1 to KI5
OSCI, OSCO
OSCI, OSCO
OSCI, OSCO
CL : See figure 1.
CL : See figure 1.
DI, CL : See figure 1.
DI, CL : See figure 1.
CE, CL : See figure 1.
CE, CL : See figure 1.
CE, CL : See figure 1.
DO: R
PU
= 4.7 kΩ, C
L
= 10 pF
*
: See figure 1.
DO: R
PU
= 4.7 kΩ, C
L
= 10 pF
*
: See figure 1.
BLK, CE : See figure 4.
10
Conditions
Ratings
min
4.5
8
0.8 V
DD
0.8 V
DD
0.6 V
DD
0
0.4
4.7
22
160
160
160
160
160
160
160
1.5
1.5
1.6
20
47
typ
5.0
12
max
5.5
18
5.5
V
DD
V
DD
0.2 V
DD
3.0
100
100
Unit
V
V
V
V
V
V
MHz
kΩ
pF
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
Supply voltage
Note: Since DO is an open-drain output, these values will vary with the pull-up resistance R
PU
and the load capacitance C
L
.
No. 6142-2/18
LC75742E, LC75742W
Electrical Characteristics
in the Allowable Operating Ranges
Parameter
Symbol
I
IH
1
I
IH
2
I
IL
V
IF
R
PD
I
OFFH
V
OH
1
High-level output voltage
V
OH
2
V
OH
3
V
OH
4
V
OL
1
Low-level output voltage
V
OL
2
V
OL
3
V
OL
4
Oscillator frequency
Hysteresis voltage
Current drain
f
OSC
V
H
I
DD
1
I
DD
2
Conditions
DI, CL, CE, BLK: V
IN
= 5.5 V
OSCI: V
IN
= V
DD
DI, CL, CE, BLK, OSCI: V
IN
= 0 V
KI1 to KI5
KI1 to KI5: V
DD
= 5.0 V
DO: V
O
= 5.5 V
S1 to S41: I
O
= –2 mA
G1, G2: I
O
= –50 mA
OSCO: I
O
= –0.5 mA
KS1 to KS6: I
O
= –500 µA
S1 to S41, G1, G2: I
O
= 50 µA
OSCO: I
O
= 0.5 mA
KS1 to KS6: I
O
= 25 µA
DO: I
O
= 1 mA
R
OSC
= 20 kΩ, C
OSC
= 47 pF
DI, CL, CE, BLK, KI1 to KI5
Sleep mode
Outputs open: f
OSC
= 1.6 MHz
0.2
0.5
0.1
1.6
0.1 V
DD
5
10
V
FL
– 0.6
V
FL
– 1.3
V
DD
– 2.0
V
DD
– 1.2
V
DD
– 0.5
V
DD
– 0.2
0.5
2.0
1.5
0.5
50
100
–5
0.05 V
DD
250
5
Ratings
min
typ
max
5
5
Unit
µA
µA
µA
V
kΩ
µA
V
V
V
V
V
V
V
V
MHz
V
µA
mA
High-level input current
Low-level input current
Input floating voltage
Pull-down resistance
Output off leakage current
• When stopped with CL at the low level
• When stopped with CL at the high level
Figure 1
No. 6142-3/18
LC75742E, LC75742W
Pin Assignment
LC75742E
LC75742W
Top view
No. 6142-4/18
LC75742E, LC75742W
Block Diagram
Pin Descriptions
Pin No.
3
59
56
58
57
Pin
V
FL
V
DD
V
SS
OSCI
OSCO
Function
Driver block power supply. Applications must provide a voltage in the range 8.0 to 18.0 V.
Logic block power supply. Applications must provide a voltage in the range 4.5 to 5.5 V.
Power supply ground. This pin must be connected to the system ground.
Oscillator circuit connections. An oscillator circuit is formed by connecting a resistor and a
capacitor externally to these pins.
Reset signal input used to initialize the IC internal state. During a reset,
the display is turned off forcibly regardless of the internal display data.
Also note that the internal key data is all reset to 0 and key scan operations are disabled.
However, serial data input is possible in this state.
Serial data interface. These pins must be connected to the system microcontroller.
Note that since DO is an open-drain output, a pull-up resistor is required.
CL: Synchronization clock
CE: Chip enable
DI: Transfer data
DO: Output data
I/O
—
—
—
I
O
Handling when unused
—
—
—
GND
OPEN
60
BLK
I
GND
63
64
62
61
1, 2
44 to 4
45 to 50
51 to 55
CL
DI
CE
DO
G1, G2
S1 to S41
KS1 to KS6
KI1 to KI5
I
GND
O
O
O
O
I
OPEN
OPEN
OPEN
OPEN
GND
Digit outputs. The frame frequency f
O
is (f
OSC
/4096) Hz.
Segment outputs that display the display data transferred over the serial interface.
Key scan outputs. Normally, when a key matrix is formed, diodes are inserted in the key
scan timing lines to prevent shorts. However, since this IC uses unbalanced CMOS outputs
in the output transistor circuit, the IC will not be damaged if these outputs are shorted.
Key scan inputs. Pull-down resistors are built into the IC internal pin circuits.
No. 6142-5/18
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