C8051F340/1/2/3/4/5/6/7
Full Speed USB Flash MCU Family
Analog Peripherals
-
10-Bit ADC
•
•
•
•
•
HIgh Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
-
-
Memory
-
4352 or 2304 Bytes RAM
-
64 or 32 kB Flash; In-system programmable in 512-byte
sectors
Instructions in 1 or 2 system clocks
48 MIPS and 25 MIPS versions available.
Expanded interrupt handler
Up to 200 ksps
Built-in analog multiplexer with single-ended and
differential mode
VREF from external pin, internal reference, or V
DD
Built-in temperature sensor
External conversion start input option
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Two comparators
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Internal voltage reference
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Brown-out detector and POR Circuitry
USB Function Controller
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USB specification 2.0 compliant
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Full speed (12 Mbps) or low speed (1.5 Mbps) operation
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Integrated clock recovery; no external crystal required for
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-
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On-Chip Debug
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On-chip debug circuitry facilitates full speed, non-intru-
-
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sive in-system debug (No emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
full speed or low speed
Supports eight flexible endpoints
1 kB USB buffer memory
Integrated transceiver; no external resistors required
Digital Peripherals
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40/25 Port I/O; All 5 V tolerant with high sink current
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Hardware enhanced SPI™, SMBus™, and one or two
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-
enhanced UART serial ports
Four general purpose 16-bit counter/timers
16-bit programmable counter array (PCA) with five cap-
ture/compare modules
External Memory Interface (EMIF)
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Clock Sources
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Internal Oscillator: 0.25% accuracy with clock recovery
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enabled. Supports all USB and UART modes
External Oscillator: Crystal, RC, C, or clock (1 or 2 Pin
modes)
Low Frequency (80 kHz) Internal Oscillator
Can switch between clock sources on-the-fly
Voltage Supply Input: 2.7 to 5.25 V
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Voltages from 3.6 to 5.25 V supported using On-Chip
Voltage Regulator
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-
Packages
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48-pin TQFP (C8051F340/1/4/5)
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32-pin LQFP (C8051F342/3/6/7)
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
CROSSBAR
UART0
UART1
SPI
SMBus
PCA
4 Timers
Port 0
Ext. Memory I/F
Port 1
Port 2
Port 3
Port 4
10-bit
200 ksps
ADC
+
-
+
-
TEMP
SENSOR
VREF
VREG
48 Pin Only
PRECISION INTERNAL
OSCILLATORS
USB Controller /
Transceiver
HIGH-SPEED CONTROLLER CORE
64/32 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(48/25 MIPS)
DEBUG
CIRCUITRY
4/2 kB RAM
POR
WDT
Rev. 0.5 1/06
Copyright © 2006 by Silicon Laboratories
C8051F34x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
C8051F340/1/2/3/4/5/6/7
N
OTES
:
2
Rev. 0.5
C8051F340/1/2/3/4/5/6/7
Table Of Contents
1. System Overview.................................................................................................... 17
1.1. CIP-51™ Microcontroller Core.......................................................................... 21
1.1.1. Fully 8051 Compatible.............................................................................. 21
1.1.2. Improved Throughput ............................................................................... 21
1.1.3. Additional Features .................................................................................. 21
1.2. On-Chip Memory............................................................................................... 23
1.3. Universal Serial Bus Controller ......................................................................... 24
1.4. Voltage Regulator ............................................................................................. 25
1.5. On-Chip Debug Circuitry................................................................................... 25
1.6. Programmable Digital I/O and Crossbar ........................................................... 26
1.7. Serial Ports ....................................................................................................... 27
1.8. Programmable Counter Array ........................................................................... 27
1.9. 10-Bit Analog to Digital Converter..................................................................... 28
1.10.Comparators..................................................................................................... 29
2. Absolute Maximum Ratings .................................................................................. 30
3. Global DC Electrical Characteristics .................................................................... 31
4. Pinout and Package Definitions............................................................................ 33
5. 10-Bit ADC (ADC0).................................................................................................. 41
5.1. Analog Multiplexer ............................................................................................ 42
5.2. Temperature Sensor ......................................................................................... 43
5.3. Modes of Operation .......................................................................................... 45
5.3.1. Starting a Conversion............................................................................... 45
5.3.2. Tracking Modes........................................................................................ 46
5.3.3. Settling Time Requirements ..................................................................... 47
5.4. Programmable Window Detector ...................................................................... 52
5.4.1. Window Detector In Single-Ended Mode ................................................. 54
5.4.2. Window Detector In Differential Mode...................................................... 55
6. Voltage Reference .................................................................................................. 57
7. Comparators ........................................................................................................... 59
8. Voltage Regulator (REG0)...................................................................................... 69
8.1. Regulator Mode Selection................................................................................. 69
8.2. VBUS Detection ................................................................................................ 69
9. CIP-51 Microcontroller ........................................................................................... 73
9.1. Instruction Set ................................................................................................... 74
9.1.1. Instruction and CPU Timing ..................................................................... 74
9.1.2. MOVX Instruction and Program Memory ................................................. 75
9.2. Memory Organization........................................................................................ 79
9.2.1. Program Memory...................................................................................... 79
9.2.2. Data Memory............................................................................................ 80
9.2.3. General Purpose Registers ...................................................................... 80
9.2.4. Bit Addressable Locations........................................................................ 80
9.2.5. Stack ....................................................................................................... 80
9.2.6. Special Function Registers....................................................................... 81
9.2.7. Register Descriptions ............................................................................... 85
Rev. 0.5
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C8051F340/1/2/3/4/5/6/7
9.3. Interrupt Handler ............................................................................................... 87
9.3.1. MCU Interrupt Sources and Vectors ........................................................ 87
9.3.2. External Interrupts .................................................................................... 87
9.3.3. Interrupt Priorities ..................................................................................... 88
9.3.4. Interrupt Latency ...................................................................................... 88
9.3.5. Interrupt Register Descriptions................................................................. 89
9.4. Power Management Modes .............................................................................. 96
9.4.1. Idle Mode.................................................................................................. 96
9.4.2. Stop Mode ................................................................................................ 96
10. Prefetch Engine ...................................................................................................... 99
11. Reset Sources....................................................................................................... 101
11.1.Power-On Reset ............................................................................................. 102
11.2.Power-Fail Reset / VDD Monitor .................................................................... 103
11.3.External Reset ................................................................................................ 104
11.4.Missing Clock Detector Reset ........................................................................ 104
11.5.Comparator0 Reset ........................................................................................ 104
11.6.PCA Watchdog Timer Reset .......................................................................... 104
11.7.Flash Error Reset ........................................................................................... 104
11.8.Software Reset ............................................................................................... 105
11.9.USB Reset...................................................................................................... 105
12. Flash Memory ....................................................................................................... 109
12.1.Programming The Flash Memory ................................................................... 109
12.1.1.Flash Lock and Key Functions ............................................................... 109
12.1.2.Flash Erase Procedure .......................................................................... 109
12.1.3.Flash Write Procedure ........................................................................... 110
12.2.Non-volatile Data Storage .............................................................................. 111
12.3.Security Options ............................................................................................. 111
13. External Data Memory Interface and On-Chip XRAM........................................ 117
13.1.Accessing XRAM............................................................................................ 117
13.1.1.16-Bit MOVX Example ........................................................................... 117
13.1.2.8-Bit MOVX Example ............................................................................. 117
13.2.Accessing USB FIFO Space .......................................................................... 118
13.3.Configuring the External Memory Interface .................................................... 119
13.4.Port Configuration........................................................................................... 119
13.5.Multiplexed and Non-multiplexed Selection.................................................... 122
13.5.1.Multiplexed Configuration....................................................................... 122
13.5.2.Non-multiplexed Configuration............................................................... 123
13.6.Memory Mode Selection................................................................................. 123
13.6.1.Internal XRAM Only ............................................................................... 124
13.6.2.Split Mode without Bank Select.............................................................. 124
13.6.3.Split Mode with Bank Select................................................................... 125
13.6.4.External Only.......................................................................................... 125
13.7.Timing .......................................................................................................... 125
13.7.1.Non-multiplexed Mode ........................................................................... 127
13.7.2.Multiplexed Mode ................................................................................... 130
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C8051F340/1/2/3/4/5/6/7
14. Oscillators ............................................................................................................. 135
14.1.Programmable Internal High-Frequency (H-F) Oscillator ............................... 136
14.1.1.Internal H-F Oscillator Suspend Mode ................................................... 136
14.2.Programmable Internal Low-Frequency (L-F) Oscillator ................................ 137
14.2.1.Calibrating the Internal L-F Oscillator..................................................... 137
14.3.External Oscillator Drive Circuit...................................................................... 139
14.3.1.Clocking Timers Directly Through the External Oscillator...................... 139
14.3.2.External Crystal Example....................................................................... 139
14.3.3.External RC Example............................................................................. 140
14.3.4.External Capacitor Example................................................................... 140
14.4.4x Clock Multiplier .......................................................................................... 142
14.5.System and USB Clock Selection .................................................................. 143
14.5.1.System Clock Selection ......................................................................... 143
14.5.2.USB Clock Selection .............................................................................. 143
15. Port Input/Output.................................................................................................. 147
15.1.Priority Crossbar Decoder .............................................................................. 149
15.2.Port I/O Initialization ....................................................................................... 151
15.3.General Purpose Port I/O ............................................................................... 154
16. Universal Serial Bus Controller (USB0).............................................................. 163
16.1.Endpoint Addressing ...................................................................................... 164
16.2.USB Transceiver ............................................................................................ 164
16.3.USB Register Access ..................................................................................... 166
16.4.USB Clock Configuration................................................................................ 170
16.5.FIFO Management ......................................................................................... 171
16.5.1.FIFO Split Mode ..................................................................................... 171
16.5.2.FIFO Double Buffering ........................................................................... 172
16.5.3.FIFO Access .......................................................................................... 172
16.6.Function Addressing....................................................................................... 173
16.7.Function Configuration and Control................................................................ 173
16.8.Interrupts ........................................................................................................ 176
16.9.The Serial Interface Engine ............................................................................ 180
16.10.Endpoint0 ..................................................................................................... 180
16.10.1.Endpoint0 SETUP Transactions .......................................................... 181
16.10.2.Endpoint0 IN Transactions................................................................... 181
16.10.3.Endpoint0 OUT Transactions............................................................... 182
16.11.Configuring Endpoints1-3 ............................................................................. 184
16.12.Controlling Endpoints1-3 IN.......................................................................... 184
16.12.1.Endpoints1-3 IN Interrupt or Bulk Mode............................................... 184
16.12.2.Endpoints1-3 IN Isochronous Mode..................................................... 185
16.13.Controlling Endpoints1-3 OUT...................................................................... 187
16.13.1.Endpoints1-3 OUT Interrupt or Bulk Mode........................................... 187
16.13.2.Endpoints1-3 OUT Isochronous Mode................................................. 188
17. SMBus ................................................................................................................... 193
17.1.Supporting Documents ................................................................................... 194
17.2.SMBus Configuration...................................................................................... 194
Rev. 0.5
5
RF/Wirelessly
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