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TP2104N3-GP013

Description
Small Signal Field-Effect Transistor,
CategoryDiscrete semiconductor    The transistor   
File Size721KB,6 Pages
ManufacturerSupertex
Download Datasheet Parametric View All

TP2104N3-GP013 Overview

Small Signal Field-Effect Transistor,

TP2104N3-GP013 Parametric

Parameter NameAttribute value
MakerSupertex
package instructionCYLINDRICAL, O-PBCY-T3
Reach Compliance Codeunknow
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage40 V
Maximum drain current (ID)0.175 A
Maximum drain-source on-resistance6 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
Maximum feedback capacitance (Crss)10 pF
JEDEC-95 codeTO-92
JESD-30 codeO-PBCY-T3
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Minimum operating temperature-55 °C
Package body materialPLASTIC/EPOXY
Package shapeROUND
Package formCYLINDRICAL
Polarity/channel typeP-CHANNEL
surface mountNO
Terminal formTHROUGH-HOLE
Terminal locationBOTTOM
transistor applicationsSWITCHING
Transistor component materialsSILICON
Supertex inc.
P-Channel Enhancement-Mode
Vertical DMOS FET
Features
High input impedance and high gain
Low power drive requirement
Ease of paralleling
Low C
ISS
and fast switching speeds
Excellent thermal stability
Integral source-drain diode
Free from secondary breakdown
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Analog switches
Power management
Telecom switches
TP2104
General Description
Applications
This low threshold, enhancement-mode (normally-off) transistor
utilizes a vertical DMOS structure and Supertex’s well-
proven, silicon-gate manufacturing process. This combination
produces a device with the power handling capabilities of
bipolar transistors and the high input impedance and positive
temperature coefficient inherent in MOS devices. Characteristic
of all MOS structures, this device is free from thermal runaway
and thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Ordering Information
Part Number
TP2104K1-G
TP2104N3-G
TP2104N3-G P002
TP2104N3-G P003
TP2104N3-G P005
TP2104N3-G P013
TP2104N3-G P014
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
Product Summary
Packing
3000/Reel
1000/Bag
BV
DSS
/BV
DGS
-40V
R
DS(ON)
(max)
Package Option
TO-236AB (SOT-23)
3-Lead TO-92
V
GS(th)
(max)
6.0Ω
-2.0V
Pin Configuration
3-Lead TO-92
2000/Reel
DRAIN
DRAIN
SOURCE
GATE
SOURCE
GATE
Absolute Maximum Ratings
Parameter
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
Operating and storage temperature
Value
BV
DSS
BV
DGS
±20V
-55
O
C to +150
O
C
TO-236AB (SOT-23)
TO-92
Product Marking
P1LW
W = Code for week sealed
= “Green” Packaging
TO-236AB (SOT-23)
Package may or may not include the following marks: Si or
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Typical Thermal Resistance
Package
TO-236AB (SOT-23)
TO-92
Doc.# DSFP-TP2104
B081313
S iT P
210 4
YYWW
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
TO-92
θ
ja
203
O
C/W
132
O
C/W
Package may or may not include the following marks: Si or
Supertex inc.
www.supertex.com
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