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5PB1110NDGK

Description
Clock Driver
Categorylogic    logic   
File Size2MB,36 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Environmental Compliance
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5PB1110NDGK Overview

Clock Driver

5PB1110NDGK Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerRenesas Electronics Corporation
package instruction,
Reach Compliance Codecompli
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
1.8V to 3.3V High-Performance
LVCMOS Clock Buffer Family
5PB11xx
Datasheet
Description
The 5PB11xx is a high-performance LVCMOS clock buffer family
of devices. It has an additive phase jitter of 50fs RMS.
There are five different fan-out variations available: 1:2 to 1:10.
The 5PB11xx supports a synchronous glitch-free output enable
(OE) function to eliminate any potential intermediate incorrect
output clock cycles when enabling or disabling outputs. It can
operate from a 1.8V to 3.3V supply.
The 5PB1104 is also available in an Automotive Grade 1,
AEC-Q100 qualified version.
Features
High-performance 1:2, 1:4, 1:6, 1:8, 1:10 LVCMOS clock buffer
Very low pin-to-pin skew: < 50ps
Very low additive jitter: < 50fs
Supply voltage: 1.8V to 3.3V
3.3V tolerant input clock
f
MAX
= 200MHz
Integrated serial termination for 50Ω channel
Packaged in 8-, 14-, 16-, 20-pin TSSOP and as small as
2 × 2 mm DFN and VFQFPN packages
temperature ranges
(-40°C to +125°C)
Typical Applications
Industrial applications
Automotive applications
Industrial (-40°C to +85°C) and extended (-40°C to +105°C)
5PB1104 available in AEC-Q100 qualified, Automotive Grade 1
Block Diagram
CLKIN
LVCMOS
LVCMOS
Y0
LVCMOS
Y1
LVCMOS
Y2
LVCMOS
Y3
LVCMOS
Yn
1G
©2020 Renesas Electronics Corporation
1
September 29, 2020
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