UPD44322323F1-A60-FQ2 datasheet, PDF

Datasheet> All Categories > storage> storage> UPD44322323F1-A60-FQ2

UPD44322323F1-A60-FQ2: DescriptionCache SRAM, 1MX32, 3.5ns, CMOS, PBGA165, 15 X 17 MM, PLASTIC, FBGA-165; Categorystorage storage; File Size717KB，40 Pages; ManufacturerNEC Electronics

Download Datasheet Parametric View All

UPD44322323F1-A60-FQ2 Overview

Cache SRAM, 1MX32, 3.5ns, CMOS, PBGA165, 15 X 17 MM, PLASTIC, FBGA-165

UPD44322323F1-A60-FQ2 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	NEC Electronics
Parts packaging code	BGA
package instruction	LBGA,
Contacts	165
Reach Compliance Code	compli
ECCN code	3A991.B.2.A
Maximum access time	3.5 ns
Other features	PIPELINED ARCHITECTURE
JESD-30 code	R-PBGA-B165
JESD-609 code	e0
length	17 mm
memory density	33554432 bi
Memory IC Type	CACHE SRAM
memory width	32
Number of functions	1
Number of terminals	165
word count	1048576 words
character code	1000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1MX32
Package body material	PLASTIC/EPOXY
encapsulated code	LBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	1.4 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15 mm

Preview

Download Datasheet

View All

PRELIMINARY DATA SHEET

MOS INTEGRATED CIRCUIT

PD44322183, 44322323, 44322363

32M-BIT CMOS SYNCHRONOUS FAST SRAM

PIPELINED OPERATION

DOUBLE CYCLE DESELECT

Description

The

PD44322183 is a 2,097,152-word by 18-bit,

PD44322323 is a 1,048,576-word by 32-bit and the

PD44322363 is

a 1,048,576-word by 36-bit synchronous static RAM fabricated with advanced CMOS technology using Full-CMOS six-

transistor memory cell.

The

PD44322183,

PD44322323 and

PD44322363 integrates unique synchronous peripheral circuitry, 2-bit burst

counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the single clock

input (CLK).

The

PD44322183,

PD44322323 and

PD44322363 are suitable for applications which require synchronous operation,

high speed, low voltage, high density and wide bit configuration, such as buffer memory.

ZZ has to be set LOW at the normal operation. When ZZ is set HIGH, the SRAM enters Power Down State (“Sleep”). In

the “Sleep” state, the SRAM internal state is preserved. When ZZ is set LOW again, the SRAM resumes normal operation.

The

PD44322183,

PD44322323 and

PD44322363 are packaged in 100-pin PLASTIC LQFP with a 1.4 mm package

thickness or 165-pin PLASTIC FBGA for high density and low capacitive loading.

Features

•

Single 3.3 V power supply

•

Synchronous operation

•

Operating temperature : T

= 0 to 70 °C (-A44, -A50, -A60)

= –40 to +85 °C (-A44Y, -A50Y, -A60Y)

•

Internally self-timed write control

•

Burst read / write : Interleaved burst and linear burst sequence

•

Fully registered inputs and outputs for pipelined operation

•

Double-Cycle deselect timing

•

All registers triggered off positive clock edge

•

3.3 V LVTTL Compatible : All inputs and outputs

•

Fast clock access time : 2.8 ns (225 MHz), 3.1 ns (200 MHz), 3.5 ns (167 MHz)

•

Asynchronous output enable : /G

•

Burst sequence selectable : MODE

•

Sleep mode : ZZ (ZZ = Open or Low : Normal operation)

•

Separate byte write enable : /BW1 to /BW4, /BWE (

PD44322323,

PD44322363)

/BW1, /BW2, /BWE (

PD44322183)

Global write enable : /GW

•

Three chip enables for easy depth expansion

•

Common I/O using three state outputs

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with NEC Electronics sales

representative for availability and additional information.

Document No. M16356EJ1V0DS00 (1st edition)

Date Published December 2002 NS CP(K)

Printed in Japan

The mark

shows major revised points.

2002

Recommended Resources

LM358 breathing light circuit diagram

Comparison of four connection methods and characteristics of differential amplifier circuita

Ordinary thyristor three-phase control circuit

5G14 external short circuit protection application circuit diagram

Zero point detection circuit

3310 rescheduled 600 amplifier diagram

Samsung 753DF and 755DF monitor pictures: [i=s] This post was last edited by jameswangsynnex on 2015-3-3 19:56 [/i] Samsung 753DFhe755DF monitor pictures...; feifei Mobile and portable

Introduction to the method of board-level online compilation and downloading of C6000 DSP code: Traditional C6000 DSP software is compiled and debugged on a WINDOWS PC through CCS. After testing, the compiled executable file is burned into FLASH. By setting the DSP startup mode to start from FLA...; fish001 Microcontroller MCU

Disassembly and analysis of GoodWe three-phase 15kW grid-connected inverter: A GoodWe three-phase 15kW grid-connected inverter, first take a look at the appearance.[/size][/font][/color] [color=#333333][font=-apple-system-font, BlinkMacSystemFont, "][size=14px] [/size][/font][...; alan000345 Analogue and Mixed Signal

[ATmega4809 Curiosity Nano Review] Buttons: On the ATmega4809 Curiosity Nano, the button uses PF6, which is also the RST pin and is set to GPIO mode by default. Because there is a 100K pull-up resistor R200 on PF6, there is no need to set the i...; dcexpert MCU

Have you fallen into these customer support "pitfalls"? Read the story, write a comment, grab a post and win a gift!: [align=left][b][font=微软雅黑][size=3]No way to get support in the middle of the night, time-consuming to return software to the factory for upgrading, too low efficiency of customer service communication...; EEWORLD社区 Test/Measurement

About rail-to-rail op amps: [size=4]1. The so-called rail-to-rail operational amplifier refers to an amplifier whose input and output voltage swings are very close to or almost equal to the power supply voltage. [/size] [size=4]...; Jacktang Analogue and Mixed Signal

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components