K6T2016U3M Family
Document Title
128K x16 bit Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No.
0.0
0.1
History
Initial Draft
Revise
- Increased operating current(I
CC1
):20mA
→
25mA
Finalize
Draft Data
October 1, 1997
December 9, 1997
Remark
Preliminary
Preliminary
1.0
August 27, 1998
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
Revision 1.0
August 1998
K6T2016U3M Family
128K x16 bit Low Power and Low Voltage CMOS Static RAM
FEATURES
•
•
•
•
•
•
Process Technology: TFT
Organization:128Kx16
Power Supply Voltage: 2.7~3.3V
Low Data Retention Voltage: 2V(Min)
Three state output and TTL Compatible
Package Type: 44-TSOP2 -400F
CMOS SRAM
GENERAL DESCRIPTION
The K6T2016U3M families are fabricated by SAMSUNG′s
advanced CMOS process technology. The families support
various operating temperature ranges and small package for
user flexibility of system design. The families also support low
data retention voltage for battery back-up operation with low
data retention current.
PRODUCT FAMILY
Power Dissipation
Product Family
K6T2016U3M-B
K6T2016U3M-F
Operating Temperature
Commercial(0~70°C)
Industrial(-40~85°C)
Vcc Range
Speed
Standby
(I
SB1
, Max)
10µA
15µA
Operating
(I
CC2
, Max)
55mA
PKG Type
2.7~3.3V
85
1)
/100ns
44-TSOP2-F
1. The parameter is measured with 30pF test load.
PIN DESCRIPTION
A4
A3
A2
A1
A0
CS
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
N.C
A8
A9
A10
A11
N.C
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
A0
A1
A2
A3
A4
A5
A6
A7
A8
A16
I/O
1
~I/O
8
Precharge circuit.
Vcc
Vss
Row
select
Memory array
1024 rows
128×16 columns
44-TSOP2
Forward
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
I/O
9
~I/O
16
Name
CS
OE
WE
UB
LB
Function
Chip Select Input
Output Enable Input
Write Enable Input
Upper Block Select Input
Lower Block Select Input
Name
Function
A9 A10 A11 A12 A13 A14 A15
I/O
1
~I/O
16
Data Inputs/Outputs
A
0
~A
16
Vcc
Vss
N.C
Address Inputs
Power
CS
Ground
No Connection
WE
OE
UB
LB
Control
logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
Revision 1.0
August 1998
K6T2016U3M Family
PRODUCT LIST
Commercial Temperature Products(0~70°C)
Part Name
K6T2016U3M-TB85
K6T2016U3M-TB10
Function
44-TSOP2, 85ns, 3.0V, LL
44-TSOP2, 100ns, 3.0V, LL
CMOS SRAM
Industrial Temperature Products(-40~85°C)
Part Name
K6T2016U3M-TF85
K6T2016U3M-TF10
Function
44-TSOP2, 85ns, 3.0V, LL
44-TSOP2, 100ns, 3.0V, LL
Note : LL - Low Low Standby Current
FUNCTIONAL DESCRIPTION
CS
H
L
L
L
L
L
L
L
L
OE
X
1)
H
X
1)
L
L
L
X
1)
X
1)
X
1)
WE
X
1)
H
X
1)
H
H
H
L
L
L
LB
X
1)
X
1)
H
L
H
L
L
H
L
UB
X
1)
X
1)
H
H
L
L
H
L
L
I/O
1~8
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
I/O
9~16
High-Z
High-Z
High-Z
High-Z
Dout
Dout
High-Z
Din
Din
Mode
Deselected
Output Disabled
Output Disabled
Lower Byte Read
Upper Byte Read
Word Read
Lower Byte Write
Upper Byte Write
Word Write
Power
Standby
Active
Active
Active
Active
Active
Active
Active
Active
1. X means don′t care. (Must be in low or high state)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Soldering temperature and time
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
T
A
T
SOLDER
Ratings
-0.5 to V
CC
+0.5
-0.3 to 4.6
1.0
-65 to 150
0 to 70
-40 to 85
260°C, 10sec (Lead Only)
Unit
V
V
W
°C
°C
°C
-
Remark
-
-
-
-
K6T2016U3M-L
K6T2016U3M-P
-
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Revision 1.0
August 1998
K6T2016U3M Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Product
K6T2016U3M Family
All Family
K6T2016U3M Family
K6T2016U3M Family
Min
2.7
0
2.2
-0.3
3)
CMOS SRAM
Typ
3.0
0
-
-
Max
3.3
0
Vcc+0.3
0.6
Unit
V
V
V
V
Note:
1. Commercial Product : T
A
=0 to 70°C, otherwise specified
Industrial Product : T
A
=-40 to 85°C, otherwise specified
2. Overshoot : V
CC
+2.0V in case of pulse width
≤
20ns
3. Undershoot : -2.0V in case of pulse width
≤
20ns
4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE
1)
(f=1MHz, T
A
=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply current
Average operating current
Symbol
I
LI
I
LO
I
CC
I
CC1
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
Standby Current (CMOS)
1. K6T2016U3M-I Family =15µA
Test Conditions
V
IN
=Vss to Vcc
CS=V
IH
or OE=V
IH
or WE=V
IL
, V
IO
=Vss to Vcc
I
IO
=0mA, CS=V
IL
, V
IN
=V
IL
or V
IH,
Read
Cycle time=1µs, 100% duty, I
IO
=0mA
CS≤0.2V V
IN
≤0.2V
or V
IN
≥Vcc-0.2V
Read
Write
Min
-1
-1
-
-
-
-
-
2.4
-
-
Typ
-
-
-
-
-
-
-
-
-
-
Max
1
1
5
5
25
55
0.4
-
0.3
10
1)
Unit
µA
µA
mA
mA
mA
V
V
mA
µA
Cycle time=Min, 100% duty, I
IO
=0mA, CS=V
IL
, V
IN
=V
IL
or V
IH
V
OL
V
OH
I
SB
I
SB1
I
OL
=2.1mA
I
OH
=-1.0mA
CS=V
IH
, Other inputs=V
IL
or V
IH
CS≥Vcc-0.2V, Other inputs=0~Vcc
Revision 1.0
August 1998
K6T2016U3M Family
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Test Input/Output Reference)
Input pulse level : 0.4 to 2.2V
Input rising and falling time : 5ns
Input and output reference voltage : 1.5V
Output load (See right) :C
L
=100pF+1TTL
C
L
=30pF+1TTL
C
L
1
)
CMOS SRAM
1. Including scope and jig capacitance
AC CHARACTERISTICS
(V
CC
=2.7~3.3V, K6T2016U3M-L Family:T
A
=0 to 70°C, K6T2016U3M-I Family:T
A
=-40 to 85°C)
Speed Bins
Parameter List
Symbol
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Byte enable to valid output
Read
Chip select to low-Z output
Output enable to low-Z output
UB, LB enable to low-Z output
Chip disable to high-Z output
UB, LB disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
UB, LB valid to end of write
Write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
1. The parameter is measured with 30pF test load.
85
1)
ns
Max
-
85
85
45
45
-
-
-
25
25
25
-
-
-
-
-
-
-
-
30
-
-
-
Min
100
-
-
-
-
10
5
5
0
0
0
15
100
80
0
80
80
70
0
0
40
0
5
100ns
Max
-
100
100
55
55
-
-
-
30
30
30
-
-
-
-
-
-
-
-
30
-
-
-
Units
t
RC
t
AA
t
CO
t
OE
t
BA
t
LZ
t
OLZ
t
BLZ
t
HZ
t
BHZ
t
OHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
BW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
85
-
-
-
-
10
5
5
0
0
0
15
85
70
0
75
75
60
0
0
35
0
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
V
DR
I
DR
t
SDR
t
RDR
Symbol
Test Condition
CS≥Vcc-0.2V
Vcc=3.0V, CS≥Vcc-0.2V
See data retention waveform
Min
2.0
-
0
5
Typ
-
-
-
-
Max
3.3
10
-
-
Unit
V
µA
ms
Revision 1.0
August 1998