K6T2008V2M, K6T2008U2M Family
Document Title
256Kx8 bit Low Power and Low Voltage CMOS Static RAM
CMOS SRAM
Revision History
Revision No.
0.0
0.1
1.0
History
Design target
Initial draft
Finalize
- Improved V
IL
(Min.): 0.4V
→
0.6V
- Erase reverse type package
- Change speed bin
KM68V2000: 70/85ns
KM68V2000I, KM68U2000, KM68U2000I : 85/100ns
- Improved standby current
Commercial product: 15µA
→
10µA
Industrial product: 30µA
→
15µA
- Increased Power dissipation: 0.7W
→
1.0W
Draft Data
January 30, 1997
April 7, 1997
November 27, 1997
Remark
Advance
Preliminary
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions. If you have any questions, please contact the SAMSUNG branch offices.
Revision 1.0
November 1997
K6T2008V2M, K6T2008U2M Family
256Kx8 bit Low Power and Low Voltage CMOS Static RAM
FEATURES
•
Process Technology: TFT
•
Organization: 256Kx8
•
Power Supply Voltage
K6T2008V2M Family: 3.0V ~ 3.6V
K6T2008U2M Family: 2.7V ~ 3.3V
•
Low Data Retention Voltage: 2V(Min)
•
Three state output and TTL Compatible
•
Package Type: 32-TSOP1-0820F, 32-TSOP1-0813.4F
CMOS SRAM
GENERAL DESCRIPTION
The K6T2008V2M and K6T2008U2M families are fabricated
by SAMSUNG′s advanced CMOS process technology. The
families support various operating temperature ranges and
have various package types for user flexibility of system
design. The families also support low data retention voltage
for battery back-up operation with low data retention current.
PRODUCT FAMILY
Power Dissipation
Product Family
Operating Temperature
Vcc Range
Speed
Standby
(I
SB1
, Max)
10µA
40mA
1)
15µA
32-TSOP1-0820F
32-TSOP1-0813.4F
Operating
(I
CC2,
Max)
PKG Type
K6T2008V2M-B
K6T2008U2M-B
K6T2008V2M-F
K6T2008U2M-F
1. K6T2008V2M family = 50mA
Commercial
(0~70°C)
Industrial
(-40~85°C)
3.0~3.6V
2.7~3.3V
3.0~3.6V
2.7~3.3V
70/85ns
85/100ns
85/100ns
85/100ns
PIN DESCRIPTION
A11
A9
A8
A13
WE
CS2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
A3
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Precharge circuit.
A3
A8
A9
A10
A11
A13
A14
A15
A16
A17
32-TSOP
32-sTSOP1
Type - Forward
Row
select
Memory array
1024 rows
256×8 columns
Name
CS
1
,CS
2
OE
WE
A
0
~A
17
I/O
1
~I/O
8
Vcc
Vss
NC
Function
Chip Select Input
Output Enable Input
Write Enable Input
Address Inputs
I/O
1
I/O
8
Data
cont
I/O Circuit
Column select
Data
cont
A0
A1 A2 A4 A5 A6 A7
A12
Data Inputs/Outputs
Power
Ground
No Connection
CS
1
CS
2
WE
OE
Control
logic
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
Revision 1.0
November 1997
K6T2008V2M, K6T2008U2M Family
PRODUCT LIST
Commercial Temperature Products(0~70°C)
Part Name
K6T2008V2M-TB70
K6T2008V2M-TB85
K6T2008U2M-TB85
K6T2008U2M-TB10
K6T2008V2M-YB70
K6T2008V2M-YB85
K6T2008U2M-YB85
K6T2008U2M-YB10
Function
32-TSOP1-F, 70ns, 3.3V, LL
32-TSOP1-F, 85ns, 3.3V, LL
32-TSOP1-F, 85ns, 3.0V, LL
32-TSOP1-F, 100ns, 3.0V, LL
32-sTSOP1-F, 70ns, 3.3V,LL
32-sTSOP1-F, 85ns, 3.3V,LL
32-sTSOP1-F, 85ns, 3.0V, LL
32-sTSOP1-F, 100ns, 3.0V, LL
CMOS SRAM
Industrial Temperature Products(-40~85°C)
Part Name
Function
32-TSOP1-F, 85ns, 3.3V, LL
32-TSOP1-F, 100ns, 3.3V, LL
32-TSOP1-F, 85ns, 3.0V, LL
32-TSOP1-F, 100ns, 3.0V, LL
32-sTSOP1-F, 85ns, 3.3V,LL
32-sTSOP1-F, 100ns, 3.3V,LL
32-sTSOP1-F, 85ns, 3.0V, LL
32-sTSOP1-F, 100ns, 3.0V, LL
K6T2008V2M-TF85
K6T2008V2M-TF10
K6T2008U2M-TF85
K6T2008U2M-TF10
K6T2008V2M-YF85
K6T2008V2M-YF10
K6T2008U2M-YF85
K6T2008U2M-YF10
FUNCTIONAL DESCRIPTION
CS
1
H
X
1)
L
L
L
CS
2
X
1)
L
H
H
H
OE
X
1)
X
1)
H
L
X
1)
WE
X
1)
X
1)
H
H
L
I/O
High-Z
High-Z
High-Z
Dout
Din
Mode
Deselected
Deselected
Output Disabled
Read
Write
Power
Standby
Standby
Active
Active
Active
1. X means don′t care (Must be in high or low states)
ABSOLUTE MAXIMUM RATINGS
1)
Item
Voltage on any pin relative to Vss
Voltage on Vcc supply relative to Vss
Power Dissipation
Storage temperature
Operating Temperature
Soldering temperature and time
Symbol
V
IN
,V
OUT
V
CC
P
D
T
STG
T
A
T
SOLDER
Ratings
-0.5 to V
CC
+0.5
-0.3 to 4.6
1.0
-65 to 150
0 to 70
-40 to 85
260°C, 10sec(Lead Only)
Unit
V
V
W
°C
°C
°C
-
Remark
-
-
-
-
K6T2008V2M-B, K6T2008U2M-B
K6T2008V2M-F, K6T2008U2M-F
-
1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be
restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Revision 1.0
November 1997
K6T2008V2M, K6T2008U2M Family
RECOMMENDED DC OPERATING CONDITIONS
1)
Item
Supply voltage
Ground
Input high voltage
Input low voltage
Symbol
Vcc
Vss
V
IH
V
IL
Product
K6T2008V2M Family
K6T2008U2M Family
All Family
K6T2008V2M, K6T2008U2M Family
K6T2008V2M, K6T2008U2M Family
Min
3.0
2.7
0
2.2
-0.3
3)
Typ
3.3
3.0
0
-
-
CMOS SRAM
Max
3.6
3.3
0
Vcc+0.3
2)
0.6
Unit
V
V
V
V
Note:
1. Commercial Product: T
A
=0 to 70°C, otherwise specified
Industrial Product: T
A
=-40 to 85°C, otherwise specified
2. Overshoot: Vcc+3.0V in case of pulse width≤30ns
3. Undershoot: -3.0V in case of pulse width≤30ns
4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE
1)
(f=1MHz, TA=25°C)
Item
Input capacitance
Input/Output capacitance
1. Capacitance is sampled, not 100% tested
Symbol
C
IN
C
IO
Test Condition
V
IN
=0V
V
IO
=0V
Min
-
-
Max
8
10
Unit
pF
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Operating power supply
Average operating current
Symbol
I
LI
I
LO
I
CC
I
CC1
I
CC2
Output low voltage
Output high voltage
Standby Current(TTL)
Standby Current(CMOS)
1. K6T2008V2M Family = 50mA
2. Industrial product = 15µA
Test Conditions
V
IN
=Vss to Vcc
CS
1
=V
IH
or CS
2
=V
IL
or OE=V
IH
or WE=V
IL
, V
IO
=Vss to Vcc
I
IO
=0mA, CS
1
=V
IL
, CS
2
=V
IH,
V
IN
=V
IH
or V
IL
, Read
Cycle time=1µs, 100%duty, I
IO
=0mA, CS
1
≤0.2V,
CS
2
≥Vcc-0.2V,
V
IN
≤0.2V
or V
IN
≥V
CC
-0.2V
Read
Write
Min
-1
-1
-
-
-
-
-
2.2
-
-
Typ
-
-
2
2
10
30
-
-
-
0.2
Max
1
1
5
5
15
40
1)
0.4
-
0.3
10
2)
Unit
µA
µA
mA
mA
mA
V
V
mA
µA
Cycle time=Min, 100% duty, I
IO
=0mA, CS
1
=V
IL
, CS
2
=V
IH,
V
IN
=V
IH
or V
IL
V
OL
V
OH
I
SB
I
SB1
I
OL
=2.1mA
I
OH
=-1.0mA
CS
1
=V
IH
, CS2=V
IL
, Other inputs=V
IH
or V
IL
CS
1
≥Vcc-0.2V,
CS
2
≥Vcc-0.2V
or CS
2
≤0.2V,
Other inputs=0~Vcc
Revision 1.0
November 1997
K6T2008V2M, K6T2008U2M Family
AC OPERATING CONDITIONS
TEST CONDITIONS
(Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): C
L
=100pF+1TTL
C
L
1)
CMOS SRAM
1. Including scope and jig capacitance
AC CHARACTERISTICS
(K6T2008V2M Family: V
CC
=3.0~3.6V, K6T2008U2M Family: V
CC
=2.7~3.3V
Commercial Product: T
A
=0 to 70°C, Industrial Product: T
A
=-40 to 85°C)
Speed Bins
Parameter List
Symbol
70ns
Min
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Read
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
t
RC
t
AA
t
CO1
, t
CO2
t
OE
t
LZ
t
OLZ
t
HZ
t
OHZ
t
OH
t
WC
t
CW
t
AS
t
AW
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
70
-
-
-
10
5
0
0
10
70
60
0
60
55
0
0
30
0
5
Max
-
70
70
35
-
-
25
25
-
-
-
-
-
-
-
25
-
-
-
Min
85
-
-
-
10
5
0
0
15
85
70
0
70
60
0
0
35
0
5
85ns
Max
-
85
85
40
-
-
25
25
-
-
-
-
-
-
-
30
-
-
-
100ns
Min
100
-
-
-
10
5
0
0
15
100
80
0
80
70
0
0
40
0
5
Max
-
100
100
50
-
-
30
30
-
-
-
-
-
-
-
30
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
V
DR
I
DR
t
SDR
t
RDR
Commercial
Industrial
Symbol
Test Condition
CS
1
1)
≥Vcc-0.2V
Vcc=3.0V CS
1
≥Vcc-0.2V
CS
2
≥Vcc-0.2V
or CS
2
≤0.2V
See data retention waveform
Min
2.0
-
0
5
Typ
-
0.2
-
-
Max
3.6
10
15
-
-
Unit
V
µA
ms
1. CS
1
≥Vcc-0.2V,
CS
2
≥Vcc-0.2V(CS
1
controlled) or CS
2
≤0.2V(CS
2
controlled)
Revision 1.0
November 1997
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