October 2003
rev 1.0
ASM811, ASM812
4 Pin µP Voltage Supervisor with Manual Reset
Six voltage thresholds are available to support 3V to 5V
systems:
General Description
The ASM811/ASM812 are cost effective low power supervisors
designed to monitor voltage levels of 3.0V, 3.3V and 5.0V
power
supplies
in
low-power
microprocessor
(µP),
microcontroller (µC) and digital systems. They provide excellent
reliability by eliminating external components and adjustments.
A reset signal is issued if the power supply voltage drops below
a preset reset threshold and is asserted for at least 140ms after
the supply has risen above the reset threshold. The ASM811
has an active-low output RESET that is guaranteed to be in the
correct state for V
CC
down to 1.1V. The ASM812 has an active-
high RESET output. The reset comparator is designed to ignore
fast transients on V
CC
. A debounced manual reset input allows
the user to manually reset the systems to bring them out of
locked state.
Low power consumption makes the ASM811/ASM812 ideal for
use in portable and battery operated equipment. The ASM811/
ASM812 are available in a compact 4-pin SOT-143 package
and thus use minimal board space.
RESET THRESHOLD
Suffix
L
M
J
T
S
R
Voltage
4.63
4.38
4.00
3.08
2.93
2.63
Features
•
•
•
•
•
•
•
•
•
•
New 4.0V threshold option
9µA supply current
Monitor 5V, 3.3V and 3V supplies
Manual reset input
140ms min. reset pulse width
Guaranteed over temperature
Active-low reset valid with 1.1V supply (ASM811)
Small 4-pin SOT-143 package
No external components
Power-supply transient-immune design
Applications
•
•
•
•
•
•
•
•
Computers and Controllers
Embedded controllers
Portable/Battery operated systems
Intelligent instruments
Wireless communication systems
PDAs and handheld equipment
Automotive systems
Safety Systems
Typical Operating Circuit
V
CC
V
CC
V
CC
µP
MR RESET
(RESET)
GND
RESET (RESET)
Input
GND
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
October 2003
rev 1.0
ASM811, ASM812
SOT143
GND
1
ASM811
(ASM812)
Pin Diagram:
Block Diagram
4
V
CC
V
CC
20kΩ
MR
V
CC
3
MR
(RESET) RESET
2
+
-
+
-
RESET Generator
4.63V
4.38V
4.38V
4.00V
3.08V
2.93V
2.63V
RESET
(RESET)
ASM811
(ASM812)
Pin Description
GND
Pin #
ASM811
1
2
ASM812
1
-
Pin
Name
GND
RESET
Ground.
Function
RESET is asserted LOW if V
CC
falls below V
TH
and remains LOW for T
RST
after V
CC
exceeds
the Threshold. In addition, RESET is active LOW as long as the manual reset is low.
RESET is asserted HIGH if V
CC
falls below V
TH
and remains HIGH for T
RST
after V
CC
exceeds
the threshold. In addition, RESET is active HIGH as long as the manual reset is low.
Manual Reset Input. A logic LOW on MR asserts reset. Reset remains active as long as MR is
LOW and for T
MRST
after MR returns HIGH. The active low input has an internal 20kΩ pull-up
resistor. The input should be left open if not used. It can be driven by TTL or CMOS logic or
shorted to ground by a switch.
Power supply input voltage (3.0V, 3.3V, 5.0V)
-
2
RESET
3
3
MR
4
4
V
CC
Detailed Description
Manual Reset (MR) Input
A
proper
reset
input
enables
a
microprocessor
/
A logic low on MR assserts RESET LOW on the ASM811 and
RESET HIGH on the ASM812. MR is internally pulled high
through a 20kΩ resistor and can be driven by TTL/CMOS gates
or with open collector/drain outputs. MR can be left open if not
used. MR may be connected to ground through a normally-
open momentary switch without an external debounce circuit.
A 0.1µF capacitor from MR to ground can be added for
additional noise immunity.
microcontroller to start in a known state. ASM811/812 assert
reset to prevent code execution errors during power-up, power-
down and brown-out conditions.
Reset Timing
The reset signal is asserted- LOW for the ASM811 and HIGH
for the ASM812- when the V
CC
supply voltage falls below the
threshold trip voltage and remains asserted for 140ms
minimum after the V
CC
has risen above the threshold.
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
2 of 10
October 2003
rev 1.0
5V
0V
T
RST
MR
Power Supply
MR
ASM811, ASM812
V
CC
V
TH
V
CC
V
CC
100kΩ
ASM811
RESET
GND
100kΩ
Power Supply
ASM812
MR
RESET
GND
5V
0V
5V
0V
5V
0V
T
MRST
RESET
ASM811
ASM812
RESET
Figures 2 & 3: RESET valid with V
CC
under 1.1V
Figure 1: Reset Timing and Manual Reset (MR)
Application Information
Reset Output Operation
In µP / µC systems it is important to have the processor and
the system begin operation from a known state. A reset
output to a processor is provided to prevent improper
operation during power supply sequencing or low voltage
brown-out conditions.
Bidirectional Reset Pin Interfacing
The ASM811/812 are designed to monitor the system power
supply voltages and issue a reset signal when the levels are
out of range. RESET outputs are guaranteed to be active for
V
CC
above 1.1V. When V
CC
exceeds the reset threshold, an
internal timer keeps RESET active for the reset timeout
period, after which RESET becomes inactive (HIGH for the
ASM811 and LOW for the ASM812). If V
CC
drops below the
reset threshold, RESET automatically becomes active.
Alternatively, external circuitry or an operator can initiate this
condition using the Manual Reset (MR) pin. MR can be left
open if it is not used. MR can be driven by TTL/CMOS logic
or even an external switch.
Valid Reset with V
CC
under 1.1V
To ensure logic inputs connected to the ASM811 RESET pin
are in a known state when V
CC
is under 1.1V, a 100kΩ pull-
down resistor at RESET is needed. The value is not critical.
A 100kΩ pull-up resistor to V
CC
is needed with the ASM812.
Bi-directional I/O Pin
Power supply
V
CC
Negative VCC Transients
Typically short duration transients of 100mV amplitude and
20µs duration do not cause a false RESET. A 0.1µF capacitor
at V
CC
increses transient immunity.
The ASM811/812 can interface with µP / µC bi-directional
reset pins by connecting a 4.7kΩ resistor in series with the
ASM811/812 reset output and the µP/µC bi-directional reset
input pin.
BUF
Buffered
RESET
ASM811
4.7kΩ
µC or µP
RESET
Input
GND
MR
RESET
GND
Figure 4: Bi-directional Reset Pin Interface
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
3 of 10
October 2003
rev 1.0
ASM811, ASM812
Absolute Maximum Ratings, Table 1:
Parameter
Pin Terminal Voltage With Respect To Ground
V
CC
RESET, RESET and MR
Input current at V
CC
and MR
Output current: RESET, RESET
Rate of Rise at V
CC
Min
Max
Units
-0.3
-0.3
6.0
V
CC
+ 0.3
20
20
100
V
V
mA
mA
V/µs
Note: These are stress ratings only and the functional operation is not implied. Exposure
to absolute maximum ratings for prolonged time periods may affect device reliability.
Absolute Maximum Ratings, Table 2:
Parameter
Power Dissipation (T
A
= 70°C)
Derate SOT-143 4mW/°C above 70°C
Operating temperature range
Storage temperature range
Lead temperature (Soldering, 10 sec)
-40
-65
Min
Max
320
105
160
300
Units
uW
°C
°C
°C
Note: These are stress ratings only and the functional operation is not implied. Exposure to absolute
maximum ratings for prolonged time periods may affect device reliability.
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
4 of 10
October 2003
rev 1.0
ASM811, ASM812
Electrical Characteristics:
Unless otherwise noted, V
CC
is over the full voltage range, T
A
= -40°C to 105°C.
Typical values at T
A
= 25°C, V
CC
= 5V for L/M/J devices, V
CC
= 3.3V for T/S devices and V
CC
= 3V for R devices.
Symbol
V
CC
Parameter
Input Voltage Range
Conditions
T
A
= 0°C to 70°C
T
A
= -40°C to 105°C
T
A
= -40°C to 85°C
T
A
= -40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 85°C to 105°C
V
CC
<
V
CC
<
V
CC
<
V
CC
<
5.5V, L/M/J
3.6V, R/S/T
5.5V, L/M/J
3.6V, R/S/T
Min
1.1
1.2
Typ
Max
5.5
5.5
Unit
V
V
I
CC
Supply Current (Unloaded)
9
6.8
15
10
25
20
4.70
4.75
4.86
4.45
4.50
4.56
4.06
4.10
4.20
µA
L devices
T
A
= 25°C
T
A
= -40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= -40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= -40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= -40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= -40°C to 85°C
T
A
= 85°C to 105°C
T
A
= 25°C
T
A
= -40°C to 85°C
T
A
= 85°C to 105°C
4.56
4.50
4.40
4.31
4.25
4.16
3.93
3.89
3.80
3.04
3.00
2.92
2.89
2.85
2.78
2.59
2.55
2.50
4.63
M devices
4.38
J devices
V
TH
Reset Threshold
T devices
4.00
V
3.08
3.11
3.15
3.23
2.96
3.00
3.08
2.66
2.70
2.76
ppm/°C
µs
560
240
840
ms
S devices
2.93
R devices
2.63
TC
VTH
Reset Threshold Temp.
Coefficient
V
CC
to Reset Delay
V
CC
= V
TH
to (V
TH
- 125mV),
T
A
= 0°C to 70°C
Reset Active Timeout Period
T
A
= -40°C to 105°C
140
100
10
30
60
t
MR
MR Minimum Pulse Width
µs
Notes:
1. Production testing done at TA = 25°C. Over-temperature specifications guaranteed by design only using six sigma design limits.
2. RESET output is active LOW for the ASM811 and RESET output is active HIGH for the ASM812.
3. Glitches of 100ns or less typically will not generate a reset pulse.
4 Pin µP Voltage Supervisor with Manual Reset
Notice: The information in this document is subject to change without notice
5 of 10
Power technology
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